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Marius Strum
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2010 – 2019
- 2015
- [j10]Martha Johanna Sepúlveda, Jean-Philippe Diguet, Marius Strum, Guy Gogniat:
NoC-Based Protection for SoC Time-Driven Attacks. IEEE Embed. Syst. Lett. 7(1): 7-10 (2015) - [j9]Carlos Ivan Castro Marquez, Marius Strum, Jiang Chau Wang:
A Unified Sequential Equivalence Checking Methodology to Verify RTL Designs with High-Level Functional and Protocol Specification Models. J. Electron. Test. 31(3): 255-273 (2015) - [j8]Jonas Gomes Filho, Marius Strum, Jiang Chau Wang:
Using Genetic Algorithms for Hardware Core Placement and Mapping in NoC-Based Reconfigurable Systems. Int. J. Reconfigurable Comput. 2015: 902925:1-902925:13 (2015) - [c40]Martha Johanna Sepúlveda, Guy Gogniat, Daniel Florez, Jean-Philippe Diguet, Ricardo Pires, Marius Strum:
TSV protection: Towards secure 3D-MPSoC. LASCAS 2015: 1-4 - [c39]Raul Acosta Hernandez, Marius Strum, Jiang Chau Wang:
Transformations on the FSMD of the RTL code with combinational logic statements for equivalence checking of HLS. LATS 2015: 1-6 - 2014
- [c38]Johanna Sepúlveda, Guy Gogniat, Daniel Florez, Jean-Philippe Diguet, Cesar A. Zeferino, Marius Strum:
Elastic security zones for NoC-based 3D-MPSoCs. ICECS 2014: 506-509 - [c37]Carlos Ivan Castro Marquez, Marius Strum, Jiang Chau Wang:
A unified sequential equivalence checking approach to verify high-level functionality and protocol specification implementations in RTL designs. LATW 2014: 1-6 - [c36]Johanna Sepúlveda, Guy Gogniat, Daniel Florez, Jean-Philippe Diguet, César Pedraza, Marius Strum:
3D-LeukoNoC: A dynamic NoC protection. ReConFig 2014: 1-6 - 2013
- [j7]Edgar Leonardo Romero, Marius Strum, Jiang Chau Wang:
Manipulation of Training Sets for Improving Data Mining Coverage-Driven Verification. J. Electron. Test. 29(2): 223-236 (2013) - [c35]Jean-Philippe Diguet, Marius Strum, Nicolas Le Griguer, Lydie Caetano, Martha Johanna Sepúlveda:
Scalable NoC-based architecture of neural coding for new efficient associative memories. CODES+ISSS 2013: 19:1-19:9 - [c34]Martha Johanna Sepúlveda, Guy Gogniat, Daniel Mauricio Sepúlveda, Ricardo Pires, Jiang Chau Wang, Marius Strum:
3DMIA: a multi-objective artificial immune algorithm for 3D-MPSoC multi-application 3D-NoC mapping. GECCO (Companion) 2013: 167-168 - [c33]Carlos Ivan Castro Marquez, Marius Strum, Jiang Chau Wang:
Functional verification of complete sequential behaviors: A formal treatment of discrepancies between system-level and RTL descriptions. IDT 2013: 1-6 - [c32]Jonas Gomes Filho, Marius Strum, Wang Jiang Chau:
A strategy for mapping reconfigurable cores in NoCs. LASCAS 2013: 1-4 - [c31]Jorge González, Gustavo Patino Alvarez, Marius Strum, Wang Jiang Chau:
Long range dependence in intrachip transaction level traffic. LASCAS 2013: 1-4 - [c30]Johanna Sepúlveda, Guy Gogniat, Ricardo Pires, César Pedraza, Wang Jiang Chau, Marius Strum:
QoS 3D-HoC hybrid-on-chip communication structure for dynamic 3D-MPSoCs. LASCAS 2013: 1-4 - [c29]Carlos Ivan Castro Marquez, Marius Strum, Jiang Chau Wang:
Formal equivalence checking between high-level and RTL hardware designs. LATW 2013: 1-6 - [c28]Joel Ivan Munoz Quispe, Marius Strum, Jiang Chau Wang:
PrOCov: Probabilistic output coverage model. LATW 2013: 1-6 - [c27]Johanna Sepúlveda, Guy Gogniat, Ricardo Pires, Jiang Chau Wang, Marius Strum:
Security-enhanced 3D communication structure for dynamic 3D-MPSoCs protection. SBCCI 2013: 1-6 - [c26]Johanna Sepúlveda, Guy Gogniat, Ricardo Pires, Jiang Chau Wang, Marius Strum:
An evolutive approach for designing thermal and performance-aware heterogeneous 3D-NoCs. SBCCI 2013: 1-6 - 2012
- [j6]Johanna Sepúlveda, Ricardo Pires, Guy Gogniat, Jiang Chau Wang, Marius Strum:
QoSS Hierarchical NoC-Based Architecture for MPSoC Dynamic Protection. Int. J. Reconfigurable Comput. 2012: 578363:1-578363:10 (2012) - [c25]Martha Johanna Sepúlveda, Jiang Chau Wang, Marius Strum, César Pedraza, Guy Gogniat, Ricardo Pires:
Multi-objective artificial immune algorithm for security-constrained multi-application NoC mapping. GECCO (Companion) 2012: 1449-1450 - [c24]Johanna Sepúlveda, Guy Gogniat, Ricardo Pires, Jiang Chau Wang, Marius Strum:
Hybrid-on-chip communication architecture for dynamic MP-SoC protection. SBCCI 2012: 1-6 - [c23]Gustavo Patino Alvarez, Jorge González, Jiang Chau Wang, Marius Strum:
Workload and task characterization based on operation modes timing analysis. SoCC 2012: 248-253 - 2011
- [j5]Carlos Ivan Castro Marquez, Edgar Leonardo Romero Tobar, Marius Strum, Jiang Chau Wang:
A Functional Verification Methodology Based on Parameter Domains for Efficient Input Stimuli Generation and Coverage Modeling. J. Electron. Test. 27(4): 485-503 (2011) - [c22]Carlos Ivan Castro Marquez, Marius Strum, Wang Jiang Chau, Fabian Vargas:
Formally verifying an RTOS scheduling monitor IP core in embedded systems. LATW 2011: 1-6 - [c21]Johanna Sepúlveda, Guy Gogniat, Ricardo Pires, Jiang Chau Wang, Marius Strum:
Dynamic NoC-based architecture for MPSoC security implementation. SBCCI 2011: 197-202 - 2010
- [j4]Johanna Sepúlveda, Ricardo Pires, Marius Strum, Jiang Chau Wang:
Implementation of QoSS (Quality-of-Security Service) for NoC-Based SoC Protection. Trans. Comput. Sci. 10: 187-201 (2010) - [c20]Carlos Ivan Castro Marquez, Marius Strum, Wang Jiang Chau:
Automatic generation of a parameter-domain-based functional input coverage model. LATW 2010: 1-6 - [c19]Johanna Sepúlveda, Marius Strum, Jiang Chau Wang, Ricardo Pires:
The LRD traffic impact on the NoC-based SoCs. SBCCI 2010: 97-102
2000 – 2009
- 2009
- [c18]Raul Acosta Hernandez, Marius Strum, Jiang Chau Wang, Jose Artur Quilici González:
The Multiple Pairs SMO: A modified SMO algorithm for the acceleration of the SVM training. IJCNN 2009: 1221-1228 - [c17]Carlos Ivan Castro Marquez, Marius Strum, Jiang Chau Wang:
A PD-based methodology to enhance efficiency in testbenches with random stimulation. SBCCI 2009 - 2008
- [j3]Duarte Lopes de Oliveira, Marius Strum, Sandro S. Sato:
Burst-Mode Asynchronous Controllers on FPGA. Int. J. Reconfigurable Comput. 2008: 926851:1-926851:10 (2008) - 2007
- [c16]Frederico De Faria, Marius Strum, Jiang Chau Wang:
A System-level Performance Evaluation Methodology for Network Processors Based on Network Calculus Analytical Modeling. ISVLSI 2007: 265-272 - 2005
- [c15]Edgar Leonardo Romero, Marius Strum, Jiang Chau Wang:
Comparing two testbench methods for hierarchical functional verification of a bluetooth baseband adaptor. CODES+ISSS 2005: 327-332 - [c14]John Esquiagola, Guilherme Ozari, Marcio Yukio Teruya, Marius Strum, Jiang Chau Wang:
A Dynamically Reconfigurable Bluetooth Base Band Unit. FPL 2005: 148-152 - [c13]Duarte Lopes de Oliveira, Marius Strum, Jiang Chau Wang:
Miriã_SI: a tool for the synthesis of speed-independent multi burst-mode controllers. SBCCI 2005: 56-61 - 2004
- [j2]Jiang Chau Wang, Paulo Sérgio Cardoso, Jose Artur Quilici González, Marius Strum, Ricardo Pires:
Datapath BIST Insertion Using Pre-Characterized Area and Testability Data. J. Electron. Test. 20(4): 333-344 (2004) - 2003
- [j1]Duarte Lopes de Oliveira, Marius Strum, Jiang Chau Wang, Wagner Chiepa Cunha:
Miriã: a CAD tool to synthesize multi-burst controllers for heterogeneous systems. Microelectron. Reliab. 43(2): 209-215 (2003) - [c12]Ivan Jeukens, Marius Strum:
Exploring Models of Computation through Static Analysis. FDL 2003: 605-616 - 2002
- [c11]Wang Jiang Chau, Paulo Sérgio Cardoso, Marius Strum, Ricardo Pires:
A Comparison Between Test Pattern Generation Strategies for Functional Units in BIST Applications. LATW 2002: 61-63 - [c10]Wang Jiang Chau, Jose Artur Quilici González, Marius Strum, Ricardo Pires:
BIST Plan Optimization and Independent Input Test Register Insertion for Datapath Functional Units. LATW 2002: 64-69 - [c9]João Martins, Marius Strum:
Power Management Exploration for a Block Turbo Decoder. SBCCI 2002: 217-220 - 2001
- [c8]Duarte Lopes de Oliveira, Wagner Chiepa Cunha, Marius Strum, Wang Jiang Chau:
Synthesis of Multi-Burst Controllers as Modified Huffman Machines. SBCCI 2001: 220-225 - 2000
- [c7]Jose Artur Quilici González, José Roberto de A. Amazonas, Marius Strum, Wang Jiang Chau:
Self Test Built-in Plan for Data-Path Functional Units. LATW 2000: 9-14 - [c6]Duarte Lopes de Oliveira, Marius Strum, Wang Jiang Chau, Wagner Chiepa Cunha:
Synthesis of High Performance Extended Burst Mode Asynchronous State Machines. SBCCI 2000: 41-46 - [c5]Ivan Jeukens, Marius Strum:
On the Choice of Models of Computation for Writing Executable Specifications of System Level Designs. SBCCI 2000: 159-164
1990 – 1999
- 1999
- [c4]Carlos Humberto Llanos Quintero, Marius Strum:
SINMEF - A Decomposition Based Synthesis Tool for Large FSMs. Great Lakes Symposium on VLSI 1999: 176-179 - [c3]Marcio Yukio Teruya, Marius Strum, Jiang Chau Wang:
Architectural Transformations for Hierarchical Algorithmic Descriptions. VLSI 1999: 473-484 - 1998
- [c2]Paulo Sérgio Cardoso, Marius Strum, José Roberto de A. Amazonas, Jiang Chau Wang:
A Methodology for Minimum Area Cellular Automata Generation. Asian Test Symposium 1998: 33- - [c1]José Roberto de A. Amazonas, Marius Strum, Wang Jiang Chau:
Exploring Concurrency in Data Path Functional Units BIST Plan Optimization: A Study-Case. SBCCI 1998: 244-248
Coauthor Index
aka: Johanna Sepúlveda
aka: Wang Jiang Chau
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