"The SyReC hardware description language: Enabling scalable synthesis of ..."

Robert Wille, Rolf Drechsler (2013)

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DOI: 10.1109/MWSCAS.2013.6674836

access: closed

type: Conference or Workshop Paper

metadata version: 2020-06-15

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Robert Wille, Rolf Drechsler:
The SyReC hardware description language: Enabling scalable synthesis of reversible circuits. MWSCAS 2013: 1063-1066

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