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"Design Challenges in Sub-100nm High Performance Microprocessors."

Siva G. Narendra et al. (2004)

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DOI: 10.1109/ICVD.2004.1260894

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/vlsid/NarendraETB04
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  persistent URL:
  - https://dblp.org/rec/conf/vlsid/NarendraETB04
Siva G. Narendra, Vasantha Erraguntla, James W. Tschanz, Nitin Borkar:
Design Challenges in Sub-100nm High Performance Microprocessors. VLSI Design 2004: 15-17

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