"Achieving 1-nm-Scale Equivalent Oxide Thickness Top Gate Dielectric on ..."

Jung-Soo Ko et al. (2024)

> Home

Details and statistics

DOI: 10.1109/VLSITECHNOLOGYANDCIR46783.2024.10631360

access: closed

type: Conference or Workshop Paper

metadata version: 2024-10-17

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vlsit/KoSLNJKBSP24
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsit/KoSLNJKBSP24
Jung-Soo Ko, Alex Shearer, Sol Lee, Kathryn M. Neilson, Marc Jaikissoon, Kwanpyo Kim, Stacey Bent, Krishna Saraswat, Eric Pop:
Achieving 1-nm-Scale Equivalent Oxide Thickness Top Gate Dielectric on Monolayer Transition Metal Dichalcogenide Transistors with CMOS-Friendly Approaches. VLSI Technology and Circuits 2024: 1-2

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.