"A 1.5 mW 68 dB SNDR 80 Ms/s 2 × Interleaved Pipelined SAR ADC in 28 ..."

Frank M. L. van der Goes et al. (2014)

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DOI: 10.1109/JSSC.2014.2361774

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type: Journal Article

metadata version: 2020-08-30

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Frank M. L. van der Goes, Christopher M. Ward, Santosh Astgimath, Han Yan, Jeff Riley, Zeng Zeng, Jan Mulder, Sijia Wang, Klaas Bult:
A 1.5 mW 68 dB SNDR 80 Ms/s 2 × Interleaved Pipelined SAR ADC in 28 nm CMOS. IEEE J. Solid State Circuits 49(12): 2835-2845 (2014)

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