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"A 2.5-V, 333-Mb/s/pin, 1-Gbit, double-data-rate synchronous DRAM."

Hongil Yoon et al. (1999)

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DOI: 10.1109/4.799867

access: closed

type: Journal Article

metadata version: 2022-07-05

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  - journals/jssc/YoonCYKKLLLJJJC99
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  - https://dblp.org/rec/journals/jssc/YoonCYKKLLLJJJC99
Hongil Yoon, Gi-Won Cha, Changsik Yoo, Nam-Jong Kim, Keum-Yong Kim, Chang Ho Lee, Kyu-Nam Lim, Kyuchan Lee, Jun-Young Jeon, Tae Sung Jung, Hongsik Jeong, Tae-Young Chung, Kinam Kim, Soo-In Cho:
A 2.5-V, 333-Mb/s/pin, 1-Gbit, double-data-rate synchronous DRAM. IEEE J. Solid State Circuits 34(11): 1589-1599 (1999)

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