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"Area-Optimal Transistor Folding for 1-D Gridded Cell Design."
Jordi Cortadella (2013)
- Jordi Cortadella:
Area-Optimal Transistor Folding for 1-D Gridded Cell Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(11): 1708-1721 (2013)
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