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"Dual-Vdd Interconnect With Chip-Level Time Slack Allocation for FPGA Power ..."
Yan Lin, Lei He (2006)
- Yan Lin, Lei He:
Dual-Vdd Interconnect With Chip-Level Time Slack Allocation for FPGA Power Reduction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10): 2023-2034 (2006)
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