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"Test Time Reduction of 3-D Stacked ICs Using Ternary Coded Simultaneous ..."
Iftikhar A. Soomro, Mohammad Samie, Ian K. Jennions (2020)
- Iftikhar A. Soomro
, Mohammad Samie
, Ian K. Jennions
:
Test Time Reduction of 3-D Stacked ICs Using Ternary Coded Simultaneous Bidirectional Signaling in Parallel Test Ports. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 5225-5237 (2020)

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