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"Clock skew minimization during FPGA placement."

Kai Zhu, Martin D. F. Wong (1997)

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DOI: 10.1109/43.602474

access: closed

type: Journal Article

metadata version: 2022-10-02

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Kai Zhu, Martin D. F. Wong:
Clock skew minimization during FPGA placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(4): 376-385 (1997)

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