• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 8 matches

• 2015
• 
  Eric J. Fluhr, Steve Baumgartner, David W. Boerstler, John F. Bulzacchelli, Timothy Diemoz, Daniel Dreps, George English, Joshua Friedrich, Anne Gattiker, Tilman Gloekler, Christopher J. Gonzalez, Jason Hibbeler, Keith A. Jenkins, Yong Kim, Paul Muench, Ryan Nett, Jose Paredes, Juergen Pille, Donald W. Plass, Phillip J. Restle, Raphael Robertazzi, David Shan, David W. Siljenberg, Michael A. Sperling, Kevin Stawiasz, Gregory S. Still, Zeynep Toprak Deniz, James D. Warnock, Glen A. Wiedemeier, Victor V. Zyuban:
  The 12-Core POWER8™ Processor With 7.6 Tb/s IO Bandwidth, Integrated Voltage Regulation, and Resonant Clocking. IEEE J. Solid State Circuits 50(1): 10-23 (2015)
• 
  David Shan, Phillip J. Restle, Doug Malone, Robert A. Groves, Eric Lai, Michael Koch, Jason Hibbeler, Yong Kim, Christos Vezyrtzis, Jan Feder, David Hogenmiller, Thomas J. Bucelot:
  Resonant clock mega-mesh for the IBM z13^TM. VLSIC 2015: 322-
• 2014
• 
  Phillip J. Restle, David Shan, David Hogenmiller, Yong Kim, Alan J. Drake, Jason Hibbeler, Thomas J. Bucelot, Gregory S. Still, Keith A. Jenkins, Joshua Friedrich:
  5.3 Wide-frequency-range resonant clock with on-the-fly mode changing for the POWER8^TM microprocessor. ISSCC 2014: 100-101
• 2010
• 
  Tejas Jhaveri, Vyacheslav Rovner, Lars Liebmann, Larry T. Pileggi, Andrzej J. Strojwas, Jason Hibbeler:
  Co-Optimization of Circuits, Layout and Lithography for Predictive Technology Scaling Beyond Gratings. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(4): 509-527 (2010)
• 2006
• 
  Markus Bühler, Jürgen Koehl, Jeanne Bickford, Jason Hibbeler, Ulf Schlichtmann, Ralf Sommer, Michael Pronath, Andreas Ripp:
  DFM/DFY design for manufacturability and yield - influence of process variations in digital, analog and mixed-signal circuit design. DATE 2006: 387-392
• 
  Jeanne Bickford, Jason Hibbeler, Markus Bühler, Jürgen Koehl, Dirk Müller, Sven Peyer, Christian Schulte:
  Yield Improvement by Local Wiring Redundancy. ISQED 2006: 473-478
• 2005
• 
  Xin Yuan, Kevin W. McCullen, Fook-Luen Heng, Robert F. Walker, Jason Hibbeler, Robert J. Allen, Rani R. Narayan:
  Technology migration technique for designs with strong RET-driven layout restrictions. ISPD 2005: 175-182
• 1997
• 
  Jason Hibbeler:
  Quasi-Newton Methods for Nonlinear Programming. University of Illinois Urbana-Champaign, USA, 1997