• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 33 matches

• 2017
• 
  Fan Yang, Subarna Sinha, Charles C. Chiang, Xuan Zeng, Dian Zhou:
  Improved Tangent Space-Based Distance Metric for Lithographic Hotspot Classification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(9): 1545-1556 (2017)
• 2016
• 
  Subarna Sinha, David L. Dill:
  Deciphering cancer biology using boolean methods. HLDVT 2016: 150-154
• 2014
• 
  Wei Zhao, Hailong Yao, Yici Cai, Subarna Sinha, Charles C. Chiang:
  Fast and scalable parallel layout decomposition in double patterning lithography. Integr. 47(2): 175-183 (2014)
• 
  Suman Deb, Subarna Sinha:
  Comparative Improvement of Image Segmentation Performance with Graph Based Method over Watershed Transform Image Segmentation. ICDCIT 2014: 322-332
• 2013
• 
  Subarna Sinha, Suman Deb:
  Graph Coloring Problem Solution Using Modified Flocking Algorithm. SocProS (2) 2013: 113-123
• 2012
• 
  Kai-Ti Hsu, Subarna Sinha, Yu-Chuan Pi, Tsung-Yi Ho:
  A Hierarchy-Based Distributed Algorithm for Layout Geometry Operations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(10): 1546-1557 (2012)
• 
  Jing Guo, Fan Yang, Subarna Sinha, Charles C. Chiang, Xuan Zeng:
  Improved tangent space based distance metric for accurate lithographic hotspot classification. DAC 2012: 1173-1178
• 
  Yen-Ting Yu, Ya-Chung Chan, Subarna Sinha, Iris Hui-Ru Jiang, Charles C. Chiang:
  Accurate process-hotspot detection using critical design rule extraction. DAC 2012: 1167-1172
• 2011
• 
  Yu-Shen Yang, Subarna Sinha, Andreas G. Veneris, Robert K. Brayton:
  Automating Logic Transformations With Approximate SPFDs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(5): 651-664 (2011)
• 
  Kai-Ti Hsu, Subarna Sinha, Yu-Chuan Pi, Charles C. Chiang, Tsung-Yi Ho:
  A distributed algorithm for layout geometry operations. DAC 2011: 182-187
• 2010
• 
  Linfu Xiao, Subarna Sinha, Jingyu Xu, Evangeline F. Y. Young:
  Fixed-outline thermal-aware 3D floorplanning. ASP-DAC 2010: 561-567
• 2009
• 
  Charles C. Chiang, Subarna Sinha:
  The road to 3D EDA tool readiness. ASP-DAC 2009: 429-436
• 
  Yu-Shen Yang, Subarna Sinha, Andreas G. Veneris, Robert K. Brayton, Duncan Exon Smith:
  Sequential logic rectifications with approximate SPFDs. DATE 2009: 1698-1703
• 2008
• 
  Hailong Yao, Subarna Sinha, Jingyu Xu, Charles C. Chiang, Yici Cai, Xianlong Hong:
  Efficient range pattern matching algorithm for process-hotspot detection. IET Circuits Devices Syst. 2(1): 2-15 (2008)
• 2007
• 
  Charles C. Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky:
  Fast and Efficient Bright-Field AAPSM Conflict Detection and Correction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(1): 115-126 (2007)
• 
  Subarna Sinha, Jianfeng Luo, Charles C. Chiang:
  Model Based Layout Pattern Dependent Metal Filling Algorithm for Improved Chip Surface Uniformity in the Copper Process. ASP-DAC 2007: 1-6
• 
  Yu-Shen Yang, Subarnarekha Sinha, Andreas G. Veneris, Robert K. Brayton:
  Automating Logic Rectification by Approximate SPFDs. ASP-DAC 2007: 402-407
• 
  Subarna Sinha, Charles C. Chiang:
  A methodology for fast and accurate yield factor estimation during global routing. ICCAD 2007: 481-487
• 
  Jingyu Xu, Subarna Sinha, Charles C. Chiang:
  Accurate detection for process-hotspots with vias and incomplete specification. ICCAD 2007: 839-846
• 
  Subarna Sinha, Qing Su, Linni Wen, Frank Lee, Charles C. Chiang, Yi-Kan Cheng, Jin-Lien Lin, Yu-Chyi Harn:
  A New Flexible Algorithm for Random Yield Improvement. ISQED 2007: 795-800
• 
  Charles C. Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky:
  Bright-Field AAPSM Conflict Detection and Correction. CoRR abs/0710.4661 (2007)
• 2006
• 
  Alan Mishchenko, Jin S. Zhang, Subarnarekha Sinha, Jerry R. Burch, Robert K. Brayton, Malgorzata Chrzanowska-Jeske:
  Using simulation and satisfiability to compute flexibilities in Boolean networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(5): 743-755 (2006)
• 
  Jianfeng Luo, Subarna Sinha, Qing Su, Jamil Kawa, Charles C. Chiang:
  An IC manufacturing yield model considering intra-die variations. DAC 2006: 749-754
• 
  Hailong Yao, Subarna Sinha, Charles C. Chiang, Xianlong Hong, Yici Cai:
  Efficient process-hotspot detection using range pattern matching. ICCAD 2006: 625-632
• 2005
• 
  Charles C. Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky:
  Bright-Field AAPSM Conflict Detection and Correction. DATE 2005: 908-913
• 
  Charles C. Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu:
  Fast and efficient phase conflict detection and correction in standard-cell layouts. ICCAD 2005: 149-156
• 2004
• 
  Sunil P. Khatri, Subarnarekha Sinha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
  SPFD-based wire removal in standard-cell and network-of-PLA circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(7): 1020-1030 (2004)
• 2002
• 
  Subarnarekha Sinha, Alan Mishchenko, Robert K. Brayton:
  Topologically constrained logic synthesis. ICCAD 2002: 679-686
• 
  Robert K. Brayton, M. Gao, Jie-Hong Roland Jiang, Yunjian Jiang, Yinghua Li, Alan Mishchenko, Subarnarekha Sinha, Tiziano Villa:
  Optimization of Multi-Valued Multi-Level Networks. ISMVL 2002: 168-179
• 
  Subarnarekha Sinha, Alan Mishchenko, Robert K. Brayton:
  Topologically Constrained Logic Synthesis. IWLS 2002: 13-20

skipping 3 more matches