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Publication search results
found 68 matches
- 2016
- Jason Helge Anderson:
High-level synthesis - the right side of history. FPT 2016: 1 - Naoki Ando, Koichiro Masuyama, Hayate Okuhara, Hideharu Amano:
Variable pipeline structure for Coarse Grained Reconfigurable Array CMA. FPT 2016: 217-220 - Yuto Arai, Shin'ichi Wakabayashi, Shinobu Nagayama, Masato Inagi:
An efficient FPGA implementation of Mahalanobis distance-based outlier detection for streaming data. FPT 2016: 257-260 - Ali Asghar, Muhammad Mazher Iqbal
, Waqar Ahmed
, Mujahid Ali, Husain Parvez, Muhammad Rashid
:
Exploring shared SRAM tables among NPN equivalent large LUTs in SRAM-based FPGAs. FPT 2016: 229-232 - Donald G. Bailey
:
Identification of Trax threats using pattern matching. FPT 2016: 319-322 - Ondrej Cekan
, Jakub Podivinsky, Zdenek Kotásek:
Random stimuli generation based on a stochastic context-free grammar. FPT 2016: 295-296 - Xinyu Chen, Yong Gu, Chenxu Wang, Xuguang Guan:
Asymmetric multiprocessing for motion control based on Zynq SoC. FPT 2016: 315-318 - Junying Chen, Shunfeng Zhou, Huaqing Min:
Implementation of parallel medical ultrasound imaging algorithm on CAPI-enabled FPGA. FPT 2016: 311-314 - Kumar H. B. Chethan, Shubham Agarwal, Nachiket Kapre:
Deflection routing for multi-level FPGA overlay NoCs. FPT 2016: 149-156 - Roberto DiCecco, Griffin Lacey, Jasmina Vasiljevic, Paul Chow, Graham W. Taylor, Shawki Areibi:
Caffeinated FPGAs: FPGA framework For Convolutional Neural Networks. FPT 2016: 265-268 - Li Ding, Ping Kang, Wenbo Yin, Linli Wang:
Hardware TCP Offload Engine based on 10-Gbps Ethernet for low-latency network communication. FPT 2016: 269-272 - Jorge Echavarria
, Stefan Wildermann, Andreas Becher
, Jürgen Teich, Daniel Ziener
:
FAU: Fast and error-optimized approximate adder units on LUT-Based FPGAs. FPT 2016: 213-216 - Juan Escobedo, Mingjie Lin:
Tessellation-based multi-block memory mapping scheme for high-level synthesis with FPGA. FPT 2016: 125-132 - Sean Fox, Stephen Tridgell, Craig T. Jin
, Philip Heng Wai Leong
:
Random projections for scaling machine learning on FPGAs. FPT 2016: 85-92 - Quentin Gautier, Alric Althoff, Pingfan Meng, Ryan Kastner
:
Spector: An OpenCL FPGA benchmark suite. FPT 2016: 141-148 - Dennis R. E. Gnad
, Fabian Oboril, Saman Kiamehr, Mehdi Baradaran Tahoori:
Analysis of transient voltage fluctuations in FPGAs. FPT 2016: 12-19 - Lingkan Gong, Tong Wu
, Nguyen T. H. Nguyen, Dimitris Agiakatsikas
, Zhuoran Zhao, Ediz Cetin
, Oliver Diessel
:
A Programmable Configuration Controller for fault-tolerant applications. FPT 2016: 117-124 - Sumedh Guha, Wen Wang, Shafeeq Ibraheem, Mahesh Balakrishnan, Jakub Szefer:
Design and implementation of open-source SATA III core for Stratix V FPGAs. FPT 2016: 237-240 - Zhenxue He, Limin Xiao, Longbing Zhang, Fei Gu, Zhisheng Huo, Mingfa Zhu, Li Ruan, Rui Liu, Xiang Wang:
EMA-FPRMs: An efficient minimization algorithm for fixed polarity Reed-Muller expressions. FPT 2016: 253-256 - Naifeng Jing, Taozhong Li, Zhongyuan Zhao, Wei Jin, Yanan Sun, Weifeng He, Zhigang Mao:
Enabling in-situ logic-in-memory capability using resistive-RAM crossbar memory. FPT 2016: 233-236 - Lana Josipovic
, Nithin George, Paolo Ienne:
Enriching C-based High-Level Synthesis with parallel pattern templates. FPT 2016: 177-180 - Muhammed Al Kadi, Michael Hübner:
Integer computations with soft GPGPU on FPGAs. FPT 2016: 28-35 - Lester Kalms, Ahmed Elhossini, Ben H. H. Juurlink:
FPGA based hardware accelerator for KAZE feature extraction algorithm. FPT 2016: 281-284 - Ayesha Khalid, James Howe, Ciara Rafferty, Máire O'Neill:
Time-independent discrete Gaussian sampling for post-quantum cryptography. FPT 2016: 241-244 - Akira Kojima:
Trax player implementation on FPGA using high level synthesis tool. FPT 2016: 327-330 - Martin Krcma, Zdenek Kotásek, Jakub Lojda:
Implementation of fault tolerant techniques into FPNNs. FPT 2016: 297-298 - Zhehao Li, Jifang Jin, Lingli Wang, Ji Yang, Jiahua Lu:
A moving object extraction and classification system based on Zynq and IBM SuperVessel. FPT 2016: 307-310 - Lin Li, Quansheng Yang:
SMCFA: A Zynq-based stacked multi CPU-FPGA architecture. FPT 2016: 303-306 - Mengjun Li, Yongxin Zhu, Xu Wang, Tian Huang
, Weida Chen, Bin Liu, Yishu Mao:
Evaluation of variable precision computing with variable precision FFT implementation on FPGA. FPT 2016: 299-300 - Björn Liebig, Andreas Koch:
High-level synthesis of resource-shared microarchitectures from irregular complex C-code. FPT 2016: 133-140
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