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Publication search results
found 87 matches
- 2001
- Vikas Agrawal, Anand Pande, Mahesh Mehendale:
High Level Synthesis Of Multi-Precision Data Flow Graphs. VLSI Design 2001: 411-416 - N. V. Arvind, P. R. Suresh, V. Sivakumar, Chandrani Pal, Debaprasad Das:
Integrated Crosstalk And Oxide Integrity Analysis In Dsm Designs. VLSI Design 2001: 518-523 - Debabrata Bagchi, Dipanwita Roy Chowdhury, Joy Mukherjee, Santanu Chattopadhyay:
A Novel Strategy to Test Core Based Designs. VLSI Design 2001: 122-127 - Shabbir H. Batterywala, H. Narayanan:
Spectral Algorithm To Compute And Synthesize Reduced Order Passive Models For Arbitrary Rc Multiports. VLSI Design 2001: 500- - Mayukh Bhattacharya, Pinaki Mazumder, Ronald J. Lomax:
Fd-Tlm Electromagnetic Field Simulation Of High-Speed Iii-V Heterojunction Bipolar Transistor Digital Logic Gates. VLSI Design 2001: 470-474 - Dilip K. Bhavsar, Rishan Tan:
Observability Register Architecture For Efficient Production Test And Debug Of Vlsi Circuits. VLSI Design 2001: 385-390 - Sudipta Bhawmik:
Introduction to SystemC. VLSI Design 2001: 7-8 - Krishnendu Chakrabarty, Andrew Exnicios, Rajatish Mukherjee:
Synthesis Of Transparent Circuits For Hierarchical An System-On-A-Chip Test. VLSI Design 2001: 431- - Supratik Chakraborty, Rajeev Murgai:
Complexity Of Minimum-Delay Gate Resizing. VLSI Design 2001: 425-430 - Thomas Clouqueur, Ozen Ercevik, Kewal K. Saluja, Hiroshi Takahashi:
Efficient Signature-Based Fault Diagnosis Using Variable Size Windows. VLSI Design 2001: 391-396 - Anand L. D'Souza, Michael S. Hsiao:
Error Diagnosis of Sequential Circuits Using Region-Based Mode. VLSI Design 2001: 103- - Vishal Dalal, C. P. Ravikumar:
Software Power Optimizations In An Embedded System. VLSI Design 2001: 254- - Koen Danckaert, Chidamber Kulkarni, Francky Catthoor, Hugo De Man, Vivek Tiwari:
A Systematic Approach for System Bus Load Reduction Applied to Medical Imaging. VLSI Design 2001: 48- - Debesh Kumar Das, Bhargab B. Bhattacharya, Satoshi Ohtake, Hideo Fujiwara:
Testable Design of Sequential Circuits with Improved Fault Efficiency. VLSI Design 2001: 128-133 - Anupam Datta, Sidharth Choudhury, Anupam Basu, Hiroyuki Tomiyama, Nikil D. Dutt:
Satisfying Timing Constraints of Preemptive Real-Time Tasks through Task Layout Technique. VLSI Design 2001: 97-102 - Abhijit K. Deb, Ahmed Hemani, Johnny Öberg, Adam Postula, Dan Lindqvist:
Hardware Software Codesign of DSP System Using Grammar Based Approach. VLSI Design 2001: 42-47 - Marco Delaurenti, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni:
Switching Noise Analysis Framework For High Speed Logic Families. VLSI Design 2001: 524-530 - Alper Demir, David E. Long, Jaijeet S. Roychowdhury:
Computing Phase Noise Eigenfunctions Directly from Harmonic Balance/Shooting Matrices. VLSI Design 2001: 283- - David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir:
Formulation and Validation of an Energy Dissipation Model for the Clock Generation Circuitry and Distribution Networks. VLSI Design 2001: 248-253 - Masa-Aki Fukase, Ryusuke Egawa, Tomoaki Sato, Tadao Nakamura:
Scaling Up Of Wave Pipelines. VLSI Design 2001: 439-445 - Sree Ganesan, Ranga Vemuri:
Library Binding for High-Level Synthesis of Analog Systems. VLSI Design 2001: 261-268 - Wolfgang Günther, Rolf Drechsler:
Implementation of Read- k-times BDDs on Top of Standard BDD Packages. VLSI Design 2001: 173-178 - Wolfgang Günther, Rolf Drechsler:
Performance Driven Optimization for MUX based FPGAs. VLSI Design 2001: 311-316 - Ruifeng Guo, Irith Pomeranz, Sudhakar M. Reddy:
On Improving Static Test Compaction for Sequential Circuits. VLSI Design 2001: 111-116 - Ram Lakhan Gupta, Anshul Kumar, Aalbert Van Der Werf, Natalino G. Busá:
Synthesizing A Long Latency Unit Within Vliw Processor. VLSI Design 2001: 460- - Ajit Gupte, Mahesh Mehendale, Ramesh Ramamritham, Deepa Nair:
Performance Considerations in Embedded DSP based System-On-a-Chip Designs. VLSI Design 2001: 36-41 - Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee, U. Nagaraj Shenoy:
Fpga Hardware Synthesis From Matlab. VLSI Design 2001: 299-304 - Ramesh Harjani, Jackson Harvey:
Tutorial: CMOS Analog Circuits for Wireless Communications. VLSI Design 2001: 18 - Jackson Harvey, Ramesh Harjani:
An Integrated Quadrature Mixer with Improved Image Rejection at Low Voltage. VLSI Design 2001: 269-273 - Mark A. Hillebrand, Thomas Schurger, Peter-Michael Seidel:
How to Half Wire Lengths in the Layout of Cyclic Shifter. VLSI Design 2001: 339-344
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