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ORCIDKotb Jabeur
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2010 – 2019
- 2018
[c16]Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Abdoulaye Gamatié, Pascal Nouet, Frederic Ouattara, Gilles Sassatelli, Kotb Jabeur, Pierre Vanhauwaert, A. Atitoaie, I. Firastrau, Gregory di Pendina, Guillaume Prenat:
Using multifunctional standardized stack as universal spintronic technology for IoT. DATE 2018: 931-936- 2017
- [c15]Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Pascal Nouet, Rui Ma, Martin Kreißig, Frank Ellinger, Kotb Jabeur, Pierre Vanhauwaert, Gregory di Pendina, Guillaume Prenat:
GREAT: HeteroGeneous IntegRated Magnetic tEchnology Using Multifunctional Standardized sTack. ISVLSI 2017: 344-349 - 2016
- [j4]Christophe Layer
, Laurent Becker, Kotb Jabeur, Sylvain Claireux, Bernard Dieny, Guillaume Prenat, Gregory di Pendina, Stephane Gros, Pierre Paoli, Virgile Javerliac, Fabrice Bernard-Granger, Loïc Decloedt:
Reducing System Power Consumption Using Check-Pointing on Nonvolatile Embedded Magnetic Random Access Memories. ACM J. Emerg. Technol. Comput. Syst. 12(4): 32:1-32:24 (2016) - [j3]Guillaume Prenat, Kotb Jabeur, Pierre Vanhauwaert, Gregory di Pendina, Fabian Oboril, Rajendra Bishnoi, Mojtaba Ebrahimi, Nathalie Lamard, Olivier Boulle, Kevin Garello, Juergen Langer, Berthold Ocker, Marie Claire Cyrille, Pietro Gambardella, Mehdi Baradaran Tahoori, Gilles Gaudin:
Ultra-Fast and High-Reliability SOT-MRAM: From Cache Replacement to Normally-Off Computing. IEEE Trans. Multi Scale Comput. Syst. 2(1): 49-60 (2016) - 2015
- [j2]Nataliya Yakymets, Ian O'Connor, Kotb Jabeur, Sébastien Le Beux:
Multi-Level Mapping of Nanocomputer Architectures Based on Hardware Reuse. IEEE J. Emerg. Sel. Topics Circuits Syst. 5(1): 88-97 (2015) - [c14]Christophe Layer, Kotb Jabeur, Laurent Becker, Bernard Dieny, Stephane Gros, Virgile Javerliac, Pierre Paoli, Fabrice Bernard-Granger:
Hybrid STT/CMOS Design of an Interrupt Based Instant On/Off Mechanism for Low-Power SoC. ISVLSI 2015: 315-320 - [c13]Christophe Layer, Kotb Jabeur, Stephane Gros, Laurent Becker, Pierre Paoli, Fabrice Bernard-Granger, Virgile Javerliac, Bernard Dieny:
Low-power hybrid STT/CMOS system-on-chip embedding non-volatile magnetic memory blocks. NEWCAS 2015: 1-4 - 2014
- [c12]Gregory di Pendina, Kotb Jabeur, Guillaume Prenat:
Hybrid CMOS/magnetic Process Design Kit and SOT-based non-volatile standard cell architectures. ASP-DAC 2014: 692-699 - 2013
- [j1]Kotb Jabeur, Ian O'Connor, Nataliya Yakymets:
Functions classification approach to generate reconfigurable fine-grain logic based on Ambipolar Independent Double Gate FET (Am-IDGFET). Microelectron. J. 44(12): 1316-1327 (2013) - 2012
- [c11]Kotb Jabeur, Ian O'Connor, Nataliya Yakymets, Sébastien Le Beux:
Ambipolar double-gate FETs for the design of compact logic structures. ACM Great Lakes Symposium on VLSI 2012: 3-8 - [c10]Kotb Jabeur, Ian O'Connor, Sébastien Le Beux, David Navarro:
Ambipolar double gate CNTFETs based reconfigurable logic cells. NANOARCH 2012: 7-13 - [c9]Kotb Jabeur, Ian O'Connor, David Navarro, Sébastien Le Beux:
Low-power design technique with ambipolar double gate devices. NANOARCH 2012: 14-21 - [c8]Ian O'Connor, Kotb Jabeur, Sébastien Le Beux, David Navarro:
Ambipolar independent double gate FET logic. NANOARCH 2012: 61-68 - 2011
- [c7]Kotb Jabeur, Nataliya Yakymets, Ian O'Connor, Sébastien Le Beux:
Fine-grain reconfigurable logic cells based on double-gate CNTFETs. ACM Great Lakes Symposium on VLSI 2011: 19-24 - [c6]Kotb Jabeur, Ian O'Connor, Nataliya Yakymets, Sébastien Le Beux:
High performance 4: 1 multiplexer with ambipolar double-gate FETs. ICECS 2011: 677-680 - [c5]Kotb Jabeur, Nataliya Yakymets, Ian O'Connor, Sébastien Le Beux:
Ambipolar double-gate FET binary-decision- diagram (Am-BDD) for reconfigurable logic cells. NANOARCH 2011: 162-168 - [c4]Nataliya Yakymets, Sébastien Le Beux, Kotb Jabeur, Ian O'Connor:
Multi-objective mapping for matrix-based nanocomputer architectures. ReCoSoC 2011: 1-7 - 2010
- [c3]Ian O'Connor, Kotb Jabeur, David Navarro, Nataliya Yakymets, Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Fabien Clermidy:
Logic cells and interconnect strategies for nanoscale reconfigurable computing fabrics. ICECS 2010: 66-69 - [c2]Kotb Jabeur, David Navarro, Ian O'Connor, Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Fabien Clermidy:
Reducing transistor count in clocked standard cells with ambipolar double-gate FETs. NANOARCH 2010: 47-52
2000 – 2009
- 2009
- [c1]Ian O'Connor, Junchen Liu, Kotb Jabeur, Nataliya Yakymets, Renaud Daviot, David Navarro, Pierre-Emmanuel Gaillardon, Fabien Clermidy, Maimouna Amadou, Gabriela Nicolescu:
Emerging Technologies and Nanoscale Computing Fabrics. VLSI-SoC 2009: 1-20
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