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Zheng Shi 0002
Person information
- affiliation: Zhejiang University, Institute of VLSI Design, Hangzhou, China
Other persons with the same name
- Zheng Shi — disambiguation page
- Zheng Shi 0001
— Jinan University, School of Intelligent Systems Science and Engineering, Zhuhai, China
- Zheng Shi 0003
— Princeton University, Princeton, NJ, USA
- Zheng Shi 0004
— Beijing Jiaotong University, Beijing Key Lab of Traffic Data Analysis and Mining, Beijing, China
- Zheng Shi 0005
— University of Chinese Academy of Sciences, Beijing, China
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2020 – today
- 2021
- [j16]Zhenyan Huang
, Zhong Tang
, Xiao-Peng Yu
, Zheng Shi
, Ling Lin, Nianxiong Nick Tan:
A BJT-Based CMOS Temperature Sensor With Duty-Cycle-Modulated Output and ±0.5°C (3σ) Inaccuracy From -40 °C to 125 °C. IEEE Trans. Circuits Syst. II Express Briefs 68(8): 2780-2784 (2021) - [c8]Zhong Tang, Yun Fang, Xiao-Peng Yu, Nianxiong Nick Tan, Zheng Shi, Pieter Harpe:
A 1-V Diode-Based Temperature Sensor with a Resolution FoM of 3.1pJ•K2 in 55nm CMOS. CICC 2021: 1-2 - 2020
- [j15]Zhong Tang
, Yun Fang
, Zheng Shi, Xiao-Peng Yu
, Nianxiong Tan, Weiwei Pan:
A 1770-µm2 Leakage-Based Digital Temperature Sensor With Supply Sensitivity Suppression in 55-nm CMOS. IEEE J. Solid State Circuits 55(3): 781-793 (2020) - [j14]Zhong Tang
, Yun Fang
, Xiao-Peng Yu
, Zheng Shi, Ling Lin, Nianxiong Nick Tan:
A Dynamic-Biased Resistor-Based CMOS Temperature Sensor With a Duty-Cycle-Modulated Output. IEEE Trans. Circuits Syst. II Express Briefs 67-II(9): 1504-1508 (2020)
2010 – 2019
- 2019
- [j13]Zhong Tang
, Yun Fang
, Zhenyan Huang
, Xiaopeng Yu
, Zheng Shi, Nianxiong Tan:
An Untrimmed BJT-Based Temperature Sensor With Dynamic Current-Gain Compensation in 55-nm CMOS Process. IEEE Trans. Circuits Syst. II Express Briefs 66-II(10): 1613-1617 (2019) - [j12]Yun Fang
, Zhong Tang
, Xiao-Peng Yu
, Zheng Shi, Kiat Seng Yeo
:
A Reliability-Oriented Startup Analysis of Injection-Locked Frequency Divider Based on Broken Symmetry Theory. IEEE Trans. Very Large Scale Integr. Syst. 27(12): 2954-2958 (2019) - 2018
- [j11]Pingping Chen
, Kui Cai
, Zheng Shi:
Rate-Adaptive Protograph LDPC Codes for Multi-Level-Cell NAND Flash Memory. IEEE Commun. Lett. 22(6): 1112-1115 (2018) - [j10]Yun Fang, Xiaopeng Yu
, Zheng Shi, Kiat Seng Yeo
:
A 2.4 mW 2.5 GHz multi-phase clock generator with duty cycle imbalance correction in 0.13 µm CMOS. Integr. 63: 87-92 (2018) - [j9]Zhong Tang
, Yun Fang
, Xiaopeng Yu
, Zheng Shi, Nianxiong Tan:
A CMOS Temperature Sensor With Versatile Readout Scheme and High Accuracy for Multi-Sensor Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11): 3821-3829 (2018) - 2017
- [c7]Ludan Yang, Weiwei Pan, Zheng Shi, Yongjun Zheng:
A novel layout automation flow to facilitate test chip design for standard cell characterization. ASICON 2017: 88-91 - [c6]Xiaoxin Dou, Weiwei Pan, Zheng Shi, Yongjun Zheng:
Design and automatic generation of area-efficient ring oscillator based addressable test chips. ASICON 2017: 492-495 - 2015
- [j8]Xiaopeng Yu
, Rong Qian Tian, Wen Lin Xu, Zheng Shi:
A New On-chip Signal Generator for Charge-Based Capacitance Measurement Circuit. J. Electron. Test. 31(3): 329-333 (2015) - [j7]Zhen Geng, Zheng Shi, Xiaolang Yan, Kai-sheng Luo, Weiwei Pan:
Fast Level-Set-Based Inverse Lithography Algorithm for Process Robustness Improvement and Its Application. J. Comput. Sci. Technol. 30(3): 629-638 (2015) - 2014
- [j6]Kai-sheng Luo, Zheng Shi, Xiaolang Yan, Zhen Geng:
SVM based layout retargeting for fast and regularized inverse lithography. J. Zhejiang Univ. Sci. C 15(5): 390-400 (2014) - 2013
- [j5]Zhen Geng, Zheng Shi, Xiaolang Yan, Kai-sheng Luo:
Regularized level-set-based inverse lithography algorithm for IC mask synthesis. J. Zhejiang Univ. Sci. C 14(10): 799-807 (2013) - [c5]Zhen Geng, Zheng Shi, Xiaolang Yan, Kai-sheng Luo:
A New Level-Set-Based Inverse Lithography Algorithm for Process Robustness Improvement with Attenuated Phase Shift Mask. CAD/Graphics 2013: 68-73 - 2012
- [j4]Jie Ren, Weiwei Pan, Yongjun Zheng, Zheng Shi, Xiaolang Yan:
Array based HV/VH tree: an effective data structure for layout representation. J. Zhejiang Univ. Sci. C 13(3): 232-237 (2012) - 2011
- [j3]Bin Lin, Xiaolang Yan, Zheng Shi, Yiwei Yang:
A sparse matrix model-based optical proximity correction algorithm with model-based mapping between segments and control sites. J. Zhejiang Univ. Sci. C 12(5): 436-442 (2011) - [j2]Bin Lin, Xiaolang Yan, Zheng Shi, Yiwei Yang:
Erratum to: A sparse matrix model-based optical proximity correction algorithm with model-based mapping between segments and control sites. J. Zhejiang Univ. Sci. C 12(7): 614 (2011) - [c4]Bo Zhang, Weiwei Pan, Yongjun Zheng, Zheng Shi, Xiaolang Yan:
A fully automated large-scale addressable test chip design with high reliability. ECCTD 2011: 61-64 - [c3]Weiwei Pan, Jie Ren, Yongjun Zheng, Zheng Shi, Xiaolang Yan:
Using NMOS transistors as switches for accuracy and area-efficiency in large-scale addressable test array. ISQED 2011: 533-538
2000 – 2009
- 2007
- [c2]Ye Chen, Zheng Shi, Xiaolang Yan:
An Automated and Fast OPC Algorithm for OPC-Aware Layout Design. ISQED 2007: 782-787 - 2005
- [j1]Xiaolang Yan, Zheng Shi, Ye Chen, Yue Ma, Gensheng Gao:
Full-IC manufacturability check based on dense silicon imaging. Sci. China Ser. F Inf. Sci. 48(4): 533-544 (2005) - [c1]Xiaolang Yan, Ye Chen, Zheng Shi, Yue Ma:
A new method for model based frugal OPC. ASP-DAC 2005: 83-86
Coauthor Index
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