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Kihan Kim
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2020 – today
- 2023
- [c7]Hyun-A. Ahn, Yoo-Chang Sung, Yong-Hun Kim, Janghoo Kim, Kihan Kim, Donghun Lee, Young-Gil Go, Jae-Woo Lee, Jae-Woo Jung, Yong-Hyun Kim, Garam Choi, Jun-Seo Park, Bo-Hyeon Lee, Jin-Hyeok Baek, Daesik Moon, Daihyun Lim, Seung-Jun Bae, Young-Soo Sohn, Changsik Yoo, Tae-Young Oh:
A 1.01V 8.5Gb/s/pin 16Gb LPDDR5x SDRAM with Self-Pre-Emphasized Stacked-Tx, Supply Voltage Insensitive Rx, and Optimized Clock Using 4th-Generation 10nm DRAM Process for High-Speed and Low-Power Applications. A-SSCC 2023: 1-4 - 2022
- [c6]Dae-Hyun Kim
, Byungkyu Song, Hyun-A. Ahn
, Woongjoon Ko, Sung-Geun Do, Seokjin Cho, Kihan Kim, Seung-Hoon Oh, Hye-Yoon Joo, Geuntae Park, Jin-Hun Jang, Yong-Hun Kim, Donghun Lee, Jaehoon Jung, Yongmin Kwon, Youngjae Kim, Jaewoo Jung, Seongil O, Seoulmin Lee, Jaeseong Lim, Junho Son, Jisu Min, Haebin Do, Jaejun Yoon, Isak Hwang, Jinsol Park, Hong Shim, Seryeong Yoon, Dongyeong Choi, Jihoon Lee, Soohan Woo, Eunki Hong, Junha Choi, Jae-Sung Kim, Sangkeun Han, Jong-Min Bang, Bokgue Park, Jang-Hoo Kim, Seouk-Kyu Choi, Gong-Heum Han, Yoo-Chang Sung, Wonil Bae, Jeong-Don Lim, Seungjae Lee, Changsik Yoo, Sang Joon Hwang, Jooyoung Lee:
A 16Gb 9.5Gb/S/pin LPDDR5X SDRAM With Low-Power Schemes Exploiting Dynamic Voltage-Frequency Scaling and Offset-Calibrated Readout Sense Amplifiers in a Fourth Generation 10nm DRAM Process. ISSCC 2022: 448-450 - 2021
- [j2]Chang-Kyo Lee
, Hyung-Joon Chi, Jin-Seok Heo, Junghwan Park, Jin-Hun Jang, Dongkeon Lee, Jaehoon Jung, Dong-Hun Lee, Dae-Hyun Kim
, Kihan Kim
, Sang-Yun Kim, Dukha Park, Youngil Lim
, Geuntae Park, Seungjun Lee, Seungki Hong
, Dae-Hyun Kwon, Isak Hwang
, Byongwook Na, Kyungryun Kim, Seouk-Kyu Choi, Hye-In Choi, Hangi-Jung, Wonil Bae, Jeong-Don Ihm, Seung-Jun Bae, Nam Sung Kim, Jung-Bae Lee:
An 8.5-Gb/s/Pin 12-Gb LPDDR5 SDRAM With a Hybrid-Bank Architecture, Low Power, and Speed-Boosting Techniques. IEEE J. Solid State Circuits 56(1): 212-224 (2021) - 2020
- [c5]Hyung-Joon Chi, Chang-Kyo Lee, Junghwan Park, Jin-Seok Heo, Jaehoon Jung, Dongkeon Lee, Dae-Hyun Kim
, Dukha Park, Kihan Kim, Sang-Yun Kim, Jinsol Park, Hyunyoon Cho, Sukhyun Lim, YeonKyu Choi, Youngil Lim, Daesik Moon, Geuntae Park, Jin-Hun Jang, Kyungho Lee, Isak Hwang, Cheol Kim, Younghoon Son, Gil-Young Kang, Kiwon Park, Seungjun Lee, Su-Yeon Doo, Chang-Ho Shin, Byongwook Na, Ji-Suk Kwon, Kyung Ryun Kim, Hye-In Choi, Seouk-Kyu Choi, Soobong Chang, Wonil Bae, Hyuck-Joon Kwon, Young-Soo Sohn, Seung-Jun Bae, Kwang-Il Park, Jung-Bae Lee:
22.2 An 8.5Gb/s/pin 12Gb-LPDDR5 SDRAM with a Hybrid-Bank Architecture using Skew-Tolerant, Low-Power and Speed-Boosting Techniques in a 2nd generation 10nm DRAM Process. ISSCC 2020: 382-384
2010 – 2019
- 2019
- [c4]Jin-Seok Heo, Kihan Kim, Dong-Hoon Lee, Chang-Kyo Lee, Daesik Moon, Kiho Kim, Jin-Hyeok Baek, Sung-Woo Yoon, Hui-Kap Yang, Kyungryun Kim, Youngjae Kim, Bokgue Park, Su-Jin Park, Joung-Wook Moon, Jae-Hyung Lee, Yun-Sik Park, Soobong Jang, Seok-Hun Hyun, Hyuck-Joon Kwon, Jung-Hwan Choi, Young-Soo Sohn, Seung-Jun Bae, Kwang-Il Park, Jung-Bae Lee:
A 5Gb/s/pin 16Gb LPDDR4/4X Reconfigurable SDRAM with Voltage-High Keeper and a Prediction-based Fast-tracking ZQ Calibration. VLSI Circuits 2019: 114- - 2017
- [c3]Chang-Kyo Lee, Yoon-Joo Eom, Jin-Hee Park, Junha Lee, Hye-Ran Kim, Kihan Kim, Young Choi, Ho-Jun Chang, Jonghyuk Kim, Jong-Min Bang, Seungjun Shin, Hanna Park, Su-Jin Park, Young-Ryeol Choi, Hoon Lee, Kyong-Ho Jeon, Jae-Young Lee, Hyo-Joo Ahn, Kyoung-Ho Kim, Jung-Sik Kim, Soobong Chang, Hyong-Ryol Hwang, Duyeul Kim, Yoon-Hwan Yoon, Seok-Hun Hyun, Joon-Young Park, Yoon-Gyu Song, Youn-Sik Park, Hyuck-Joon Kwon, Seung-Jun Bae, Tae-Young Oh, Indal Song, Yong-Cheol Bae, Jung-Hwan Choi, Kwang-Il Park, Seong-Jin Jang, Gyo-Young Jin:
23.2 A 5Gb/s/pin 8Gb LPDDR4X SDRAM with power-isolated LVSTL and split-die architecture with 2-die ZQ calibration scheme. ISSCC 2017: 390-391 - 2014
- [c2]Tae-Young Oh, Hoeju Chung, Young-Chul Cho, Jang-Woo Ryu, Kiwon Lee, Changyoung Lee, Jin-Il Lee, Hyoung-Joo Kim, Min-Soo Jang, Gong-Heum Han, Kihan Kim, Daesik Moon, Seung-Jun Bae, Joon-Young Park, Kyung-Soo Ha, Jaewoong Lee, Su-Yeon Doo, Jung-Bum Shin, Chang-Ho Shin, Kiseok Oh, Doo-Hee Hwang, Taeseong Jang, Chulsung Park, Kwang-Il Park, Jung-Bae Lee, Joo-Sun Choi:
25.1 A 3.2Gb/s/pin 8Gb 1.0V LPDDR4 SDRAM with integrated ECC engine for sub-1V DRAM core operation. ISSCC 2014: 430-431
2000 – 2009
- 2005
- [j1]Terry Daugherty, Wei-Na Lee, Harsha Gangadharbatla, Kihan Kim
, Sounthaly Outhavong:
Organizational Virtual Communities: Exploring Motivations Behind Online Panel Participation. J. Comput. Mediat. Commun. 10(4) (2005)
1990 – 1999
- 1999
- [c1]Jaeyong Koh, Kihan Kim, Heonshik Shin:
Distributing Periodic Workload Uniformly Across Time to Achieve Better Service Quality. IPPS/SPDP Workshops 1999: 413-417
Coauthor Index
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last updated on 2024-04-25 05:43 CEST by the dblp team
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