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ORCIDVishal Saxena
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2020 – today
- 2024
[j9]Vishal Saxena
, Ankur Kumar, Shubham Mishra, Samuel Palermo, Kadaba R. Lakshmikumar:
Optical Interconnects Using Hybrid Integration of CMOS and Silicon-Photonic ICs. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1632-1637 (2024)- [c36]Shubham Mishra, Vishal Saxena:
A Sub-1pJ/bit Laser Power Independent 32Gb/s Silicon Photonic EAM Driver in 65nm CMOS. ISCAS 2024: 1-5 - [c35]Anuar Dorzhigulov, Vishal Saxena:
Compact Convolutional SNN Architecture for the Neuromorphic Speech Denoising. MWSCAS 2024: 1191-1195 - [c34]Md Jubayer Shawon, Vishal Saxena:
A 7×4 Silicon Photonic Reconfigurable Optical Analog Processor with Algorithmic Calibration. OFC 2024: 1-3 - 2023
- [c33]Vikas Kumar, Shubham Mishra, Vishal Saxena:
Power Linear DACs (PLDACs) for Configuration and Control of Silicon Photonic Integrated Circuits. ISCAS 2023: 1-5 - [c32]Md Jubayer Shawon, Vishal Saxena:
A Silicon Photonic Reconfigurable Optical Analog Processor (SiROAP) with a 4x4 Optical Mesh. ISSCC 2023: 222-223 - [c31]Md Jubayer Shawon, Vishal Saxena:
Automatic In-situ Optical Linearization of Silicon Photonic Ring-Assisted MZ Modulator for Integrated RF Photonic SoCs. OFC 2023: 1-3 - [i12]Vishal Saxena, Md Jubayer Shawon:
Compact Modeling and Rapid Simulation of Silicon Photonic Micro-Disk and Ring Modulators. CoRR abs/2311.16174 (2023) - 2022
- [j8]Ruthvik Vaila, John N. Chiasson, Vishal Saxena:
A Deep Unsupervised Feature Learning Spiking Neural Network With Binarized Classification Layers for the EMNIST Classification. IEEE Trans. Emerg. Top. Comput. Intell. 6(1): 124-135 (2022) - [c30]Shubham Mishra, Md Jubayer Shawon, Anuar Dorzhigulov, Vishal Saxena:
A Hybrid CMOS Photonic 25Gbps Microring Transmitter with a -0.5-1.2V Direct-Coupled Drive. ISCAS 2022: 1000-1004 - [c29]Anuar Dorzhigulov, Shubham Mishra, Vishal Saxena:
Hybrid CMOS-RRAM Spiking CNNs with Time-Domain Max-pooling and Integrator Re-use. ISCAS 2022: 1828-1832 - 2021
- [j7]Vishal Saxena:
Mixed-Signal Neuromorphic Computing Circuits Using Hybrid CMOS-RRAM Integration. IEEE Trans. Circuits Syst. II Express Briefs 68(2): 581-586 (2021) - [c28]Vishal Saxena:
A Mixed-Signal Convolutional Neural Network Using Hybrid CMOS-RRAM Circuits. ISCAS 2021: 1-5 - [i11]Md Jubayer Shawon, Vishal Saxena:
Analysis of Trade-offs in RF Photonic Links based on Multi-Bias Tuning of Silicon Photonic Ring-Assisted Mach Zehnder Modulators. CoRR abs/2110.02737 (2021) - 2020
- [j6]Md Jubayer Shawon, Vishal Saxena:
Rapid Simulation of Photonic Integrated Circuits Using Verilog-A Compact Models. IEEE Trans. Circuits Syst. 67-I(10): 3331-3341 (2020) - [c27]Ruthvik Vaila, John N. Chiasson, Vishal Saxena:
Continuous Learning in a Single-Incremental-Task Scenario with Spike Features. ICONS 2020: 7:1-7:4 - [c26]Vishal Saxena:
A Process-Variation Robust RRAM-Compatible CMOS Neuron for Neuromorphic System-on-a-Chip. ISCAS 2020: 1-5 - [c25]Md Jubayer Shawon, Vishal Saxena:
Analysis of RF Photonic Link using Silicon Photonic Ring-Assisted Mach Zehnder Modulator. MWSCAS 2020: 810-813 - [i10]Ruthvik Vaila, John N. Chiasson, Vishal Saxena:
A Deep Unsupervised Feature Learning Spiking Neural Network with Binarized Classification Layers for EMNIST Classification. CoRR abs/2002.11843 (2020) - [i9]Ruthvik Vaila, John N. Chiasson, Vishal Saxena:
Continuous Learning in a Single-Incremental-Task Scenario with Spike Features. CoRR abs/2005.04167 (2020)
2010 – 2019
- 2019
- [c24]Ruthvik Vaila, John N. Chiasson, Vishal Saxena:
Feature Extraction using Spiking Convolutional Neural Networks. ICONS 2019: 14:1-14:8 - [c23]Md Jubayer Shawon, Vishal Saxena:
Rapid Simulation of Photonic Integrated Circuits using Verilog-A Compact Models. MWSCAS 2019: 424-427 - [c22]Rui Wang, Vishal Saxena:
A CMOS Photonic Optical PAM4 Transmitter Linearized using Three-Segment Ring Modulator. MWSCAS 2019: 1114-1117 - [c21]Vishal Saxena:
High LRS-Resistance CMOS Memristive Synapses for Energy-Efficient Neuromorphic SoCs. MWSCAS 2019: 1143-1146 - [i8]Ruthvik Vaila, John N. Chiasson, Vishal Saxena:
Deep Convolutional Spiking Neural Networks for Image Classification. CoRR abs/1903.12272 (2019) - 2018
- [j5]Kehan Zhu, Vishal Saxena:
From Design to Test: A High-Speed PRBS. IEEE Trans. Very Large Scale Integr. Syst. 26(10): 2099-2107 (2018) - [c20]Cheng Li, Kunzhi Yu, Jinsoo Rhim, Kehan Zhu, Nan Qi, Marco Fiorentino, Thierry Pinguet, Mark Peterson, Vishal Saxena, Samuel Palermo:
A 3D-Integrated 56 Gb/s NRZ/PAM4 Reconfigurable Segmented Mach-Zehnder Modulator-Based Si-Photonics Transmitter. BCICTS 2018: 32-35 - [c19]Vishal Saxena, Xinyu Wu, Kehan Zhu:
Energy-Efficient CMOS Memristive Synapses for Mixed-Signal Neuromorphic System-on-a-Chip. ISCAS 2018: 1-5 - [c18]Vishal Saxena:
A Compact CMOS Memristor Emulator Circuit and its Applications. MWSCAS 2018: 190-193 - [c17]Md Jubayer Shawon, Rui Wang, Vishal Saxena:
Design and Modeling of Silicon Photonic Ring-Based Linearized RF-to-Optical Modulator. MWSCAS 2018: 348-351 - [c16]Rui Wang, Md Jubayer Shawon, Vishal Saxena:
Design and Compact Modeling of Silicon-Photonic Coupling-Based Ring Modulators for Optical Interconnects. MWSCAS 2018: 619-622 - [i7]Xinyu Wu, Vishal Saxena:
Dendritic-Inspired Processing Enables Bio-Plausible STDP in Compound Binary Synapses. CoRR abs/1801.02797 (2018) - [i6]Vishal Saxena, Xinyu Wu, Kehan Zhu:
Energy-Efficient CMOS Memristive Synapses for Mixed-Signal Neuromorphic System-on-a-Chip. CoRR abs/1802.02342 (2018) - 2017
- [j4]Kehan Zhu, Vishal Saxena:
Case Study of a Hybrid Optoelectronic Limiting Receiver. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(10): 2797-2805 (2017) - [c15]Xinyu Wu, Vishal Saxena:
Enabling bio-plausible multi-level STDP using CMOS neurons with dendrites and bistable RRAMs. IJCNN 2017: 3522-3526 - [c14]Kehan Zhu, Sakkarapani Balagopal, Xinyu Wu, Vishal Saxena:
Realization of a 10 GHz PLL in IBM 130 nm SiGe BiCMOS process for optical transmitter. ISCAS 2017: 1-4 - [c13]Kehan Zhu, Rui Wang, Xinyu Wu, Vishal Saxena:
Behavioral modeling and characterization of silicon photonic Mach-Zehnder modulator. MWSCAS 2017: 989-992 - [c12]Vishal Saxena, Xinyu Wu, Ira Srivastava, Kehan Zhu:
Towards spiking neuromorphic system-on-a-chip with bio-plausible synapses using emerging devices. NANOCOM 2017: 18:1-18:6 - [i5]Vishal Saxena:
A Compact CMOS Memristor Emulator Circuit and its Applications. CoRR abs/1711.06819 (2017) - 2016
- [c11]Bhibhudatta Sahoo, Vishal Saxena, Karan S. Bhatia:
Tutorial 4B: ADC design - from system architecture to transistor level design. SoCC 2016: 1-4 - [c10]Kehan Zhu, Vishal Saxena, Xinyu Wu:
Modeling and optimization of the bond-wire interface in a Hybrid CMOS-photonic traveling-wave MZM transmitter. SoCC 2016: 151-156 - [i4]Xinyu Wu, Vishal Saxena:
Enabling Bio-Plausible Multi-level STDP using CMOS Neurons with Dendrites and Bistable RRAMs. CoRR abs/1612.01491 (2016) - 2015
- [j3]Xinyu Wu, Vishal Saxena, Kehan Zhu:
Homogeneous Spiking Neuromorphic System for Real-World Pattern Recognition. IEEE J. Emerg. Sel. Topics Circuits Syst. 5(2): 254-266 (2015) - [j2]Kehan Zhu, Vishal Saxena, Xinyu Wu, Wan Kuang:
Design Considerations for Traveling-Wave Modulator-Based CMOS Photonic Transmitters. IEEE Trans. Circuits Syst. II Express Briefs 62-II(4): 412-416 (2015) - [j1]Xinyu Wu, Vishal Saxena, Kehan Zhu, Sakkarapani Balagopal:
A CMOS Spiking Neuron for Brain-Inspired Neural Networks With Resistive Synapses and In Situ Learning. IEEE Trans. Circuits Syst. II Express Briefs 62-II(11): 1088-1092 (2015) - [c9]Xinyu Wu, Vishal Saxena, Kehan Zhu:
A CMOS spiking neuron for dense memristor-synapse connectivity for brain-inspired computing. IJCNN 2015: 1-6 - [c8]Kehan Zhu, Vishal Saxena, Xinyu Wu:
A comprehensive design approach for a MZM based PAM-4 silicon photonic transmitter. MWSCAS 2015: 1-4 - [i3]Xinyu Wu, Vishal Saxena, Kehan Zhu, Sakkarapani Balagopal:
A CMOS Spiking Neuron for Brain-Inspired Neural Networks with Resistive Synapses and In-Situ Learning. CoRR abs/1505.07814 (2015) - [i2]Xinyu Wu, Vishal Saxena, Kehan Zhu:
A CMOS Spiking Neuron for Dense Memristor-Synapse Connectivity for Brain-Inspired Computing. CoRR abs/1506.01069 (2015) - [i1]Xinyu Wu, Vishal Saxena, Kehan Zhu:
Homogeneous Spiking Neuromorphic System for Real-World Pattern Recognition. CoRR abs/1506.01072 (2015) - 2014
- [c7]Kehan Zhu, Vishal Saxena, Wan Kuang:
Compact Verilog-A modeling of silicon traveling-wave modulator for hybrid CMOS photonic circuit design. MWSCAS 2014: 615-618 - 2013
- [c6]Kehan Zhu, Sakkarapani Balagopal, Vishal Saxena, Wan Kuang:
Design of a 10-Gb/s integrated limiting receiver for silicon photonics interconnects. MWSCAS 2013: 713-716 - [c5]Sakkarapani Balagopal, Kehan Zhu, Vishal Saxena:
Systematic synthesis of cascaded continuous-time ΔΣ ADCs for wideband data conversion. MWSCAS 2013: 860-863 - 2012
- [c4]Sakkarapani Balagopal, Vishal Saxena:
Design of wideband continuous-time ΔΣ ADCs using two-step quantizers. MWSCAS 2012: 386-389 - [c3]Sakkarapani Balagopal, Vishal Saxena:
A 1 GS/s, 31 MHz BW, 76.3 dB dynamic range, 34 mW CT-ΔΣ ADC with 1.5 cycle quantizer delay and improved STF. MWSCAS 2012: 802-805 - 2011
- [c2]Rajaram Mohan Roy Koppula, Sakkarapani Balagopal, Vishal Saxena:
Efficient design and synthesis of decimation filters for wideband delta-sigma ADCs. SoCC 2011: 380-385
2000 – 2009
- 2005
- [c1]Vishal Saxena, Jon-Fredrik Nielsen, Ignacio Gonzalez-Gomez, Gevorg Karapetyan, Vazgen Khankaldyyan, Marvin D. Nelson Jr., Walter E. Laug:
A Non-invasive, Multi-modality Approach Based on NIRS and MRI Techniques For Monitoring Intracranial Brain Tumor Angiogenesis. AIPR 2005: 126-132
Coauthor Index
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