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Erkan Alpman
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2010 – 2019
- 2018
- [j4]Erkan Alpman, Ahmad Khairi
, Richard Dorrance
, Minyoung Park
, V. Srinivasa Somayazulu
, Jeffrey R. Foerster
, Ashoke Ravi, Jeyanandh Paramesh
, Stefano Pellerano:
802.11g/n Compliant Fully Integrated Wake-Up Receiver With -72-dBm Sensitivity in 14-nm FinFET CMOS. IEEE J. Solid State Circuits 53(5): 1411-1422 (2018) - [c9]Erkan Alpman:
Overview of low-power wake-up radio design insights. CICC 2018: 1-59 - [c8]Tanay Karnik, Dileep Kurian, Paolo A. Aseron, Richard Dorrance
, Erkan Alpman, Angela Nicoara, Roman Popov, Leonid Azarenkov, Mikhail J. Moiseev, Li Zhao, Santosh Ghosh, Rafael Misoczki, Ankit Gupta, M. Akhila, Sriram Muthukumar, Saurabh Bhandari, Satish Yada, Kartik Jain, Robert Flory, Chanitnan Kanthapanit, Eduardo Quijano, Bradley Jackson, Hao Luo, Suhwan Kim, Vaibhav A. Vaidya, Adel Elsherbini, Renzhi Liu, Farhana Sheikh
, Omesh Tickoo, Ilya Klotchkov, Manoj R. Sastry, Sheldon Sun, Mukesh Bhartiya, Anuradha Srinivasan, Yatin Hoskote, Hong Wang, Vivek De:
A cm-scale self-powered intelligent and secure IoT edge mote featuring an ultra-low-power SoC in 14nm tri-gate CMOS. ISSCC 2018: 46-48 - [c7]Amy Whitcombe, Borivoje Nikolic
, Farhana Sheikh
, Erkan Alpman, Ashoke Ravi:
A Dual-Mode Configurable RF-to-Digital Receiver in 16NM FinFET. VLSI Circuits 2018: 23-24 - 2016
- [j3]Chan-Hsiang Weng, Tzu-An Wei, Erkan Alpman, Chang-Tsung Fu, Tsung-Hsien Lin
:
A Continuous-Time Delta-Sigma Modulator Using ELD-Compensation-Embedded SAB and DWA-Inherent Time-Domain Quantizer. IEEE J. Solid State Circuits 51(5): 1235-1245 (2016) - 2015
- [j2]Sandipan Kundu, Erkan Alpman, Julia Hsin-Lin Lu, Hasnain Lakdawala, Jeyanandh Paramesh, Byunghoo Jung, Sarit Zur, Eshel Gordon:
A 1.2 V 2.64 GS/s 8 bit 39 mW Skew-Tolerant Time-interleaved SAR ADC in 40 nm Digital LP CMOS for 60 GHz WLAN. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(8): 1929-1939 (2015) - [c6]Chan-Hsiang Weng, Wei-Hsiang Huang, Erkan Alpman, Tsung-Hsien Lin
:
A 13-MHz 68-dB SNDR CTDSM using SAB loop filter and interpolating flash quantizer with random-skip IDWA function in 90-nm CMOS. A-SSCC 2015: 1-4 - 2014
- [c5]Sandipan Kundu, Julia Hsin-Lin Lu, Erkan Alpman, Hasnain Lakdawala, Jeyanandh Paramesh, Byunghoo Jung, Sarit Zur, Eshel Gordon:
A 1.2 V 2.64 GS/s 8bit 39 mW skew-tolerant time-interleaved SAR ADC in 40 nm digital LP CMOS for 60 GHz WLAN. CICC 2014: 1-4 - [c4]Chan-Hsiang Weng, Tzu-An Wei, Erkan Alpman, Chang-Tsung Fu, Yi-Ting Tseng, Tsung-Hsien Lin
:
An 8.5MHz 67.2dB SNDR CTDSM with ELD compensation embedded twin-T SAB and circular TDC-based quantizer in 90nm CMOS. VLSIC 2014: 1-2 - 2013
- [j1]Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Khoa Minh Nguyen, Hyung-Jin Lee, Ashoke Ravi, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst
, Stefano Pellerano, Tong Kim, Satish Venkatesan, Durgesh Srivastava, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Sunder Ramamurthy, Raj Yavatkar, Krishnamurthy Soumyanath:
A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver. IEEE J. Solid State Circuits 48(1): 91-103 (2013) - 2012
- [c3]Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst
, Stefano Pellerano, Tong Kim, Durgesh Srivastava, Satish Venkatesan, Hyung-Jin Lee, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Krishnamurthy Soumyanath, Sunder Ramamurthy:
32nm x86 OS-compliant PC on-chip with dual-core Atom® processor and RF WiFi transceiver. ISSCC 2012: 62-64 - [c2]Yulin Tan, Jon Duster, Chang-Tsung Fu, Erkan Alpman, Ajay Balankutty, Chun C. Lee, Ashoke Ravi, Stefano Pellerano, Kailash Chandrashekar, Hyung Seok Kim, Brent R. Carlton, Satoshi Suzuki, M. Shafi, Yorgos Palaskas, Hasnain Lakdawala:
A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS. VLSIC 2012: 76-77
2000 – 2009
- 2009
- [c1]Erkan Alpman, Hasnain Lakdawala, L. Richard Carley, Krishnamurthy Soumyanath:
A 1.1V 50mW 2.5GS/s 7b Time-Interleaved C-2C SAR ADC in 45nm LP digital CMOS. ISSCC 2009: 76-77
Coauthor Index
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last updated on 2024-04-25 05:57 CEST by the dblp team
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