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Publication search results
found 31 matches
- 2024
- Ping-Chun Wu, Jian-Wei Su, Yen-Lin Chung, Li-Yang Hong, Jin-Sheng Ren, Fu-Chun Chang, Yuan Wu, Ho-Yu Chen, Chen-Hsun Lin, Hsu-Ming Hsiao, Sih-Han Li, Shyh-Shyuan Sheu, Shih-Chieh Chang, Wei-Chung Lo, Chih-I Wu, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang:
An 8b-Precision 6T SRAM Computing-in-Memory Macro Using Time-Domain Incremental Accumulation for AI Edge Chips. IEEE J. Solid State Circuits 59(7): 2297-2309 (2024) - Ping-Chun Wu, Jian-Wei Su, Li-Yang Hong, Jin-Sheng Ren, Chih-Han Chien, Ho-Yu Chen, Chao-En Ke, Hsu-Ming Hsiao, Sih-Han Li, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang:
A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid-Domain Structure for Advanced AI Edge Chips. IEEE J. Solid State Circuits 59(1): 196-207 (2024) - Jian-Wei Su, Pei-Jung Lu, Ping-Chun Wu, Yen-Chi Chou, Ta-Wei Liu, Yen-Lin Chung, Li-Yang Hung, Jin-Sheng Ren, Wei-Hsing Huang, Chih-Han Chien, Peng-I Mei, Sih-Han Li, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Hao-Chiao Hong, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang:
8-Bit Precision 6T SRAM Compute-in-Memory Macro Using Global Bitline-Combining Scheme for Edge AI Chips. IEEE Trans. Circuits Syst. II Express Briefs 71(4): 2304-2308 (2024) - 2023
- Jian-Wei Su, Yen-Chi Chou, Ruhui Liu, Ta-Wei Liu, Pei-Jung Lu, Ping-Chun Wu, Yen-Lin Chung, Li-Yang Hong, Jin-Sheng Ren, Tianlong Pan, Chuan-Jia Jhang, Wei-Hsing Huang, Chih-Han Chien, Peng-I Mei, Sih-Han Li, Shyh-Shyuan Sheu, Shih-Chieh Chang, Wei-Chung Lo, Chih-I Wu, Xin Si, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang:
A 8-b-Precision 6T SRAM Computing-in-Memory Macro Using Segmented-Bitline Charge-Sharing Scheme for AI Edge Chips. IEEE J. Solid State Circuits 58(3): 877-892 (2023) - Ping-Chun Wu, Jian-Wei Su, Li-Yang Hong, Jin-Sheng Ren, Chih-Han Chien, Ho-Yu Chen, Chao-En Ke, Hsu-Ming Hsiao, Sih-Han Li, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang:
A 22nm 832Kb Hybrid-Domain Floating-Point SRAM In-Memory-Compute Macro with 16.2-70.2TFLOPS/W for High-Accuracy AI-Edge Devices. ISSCC 2023: 126-127 - 2022
- Jian-Wei Su, Xin Si, Yen-Chi Chou, Ting-Wei Chang, Wei-Hsing Huang, Yung-Ning Tu, Ruhui Liu, Pei-Jung Lu, Ta-Wei Liu, Jing-Hong Wang, Yen-Lin Chung, Jin-Sheng Ren, Fu-Chun Chang, Yuan Wu, Hongwu Jiang, Shanshi Huang, Sih-Han Li, Shyh-Shyuan Sheu, Chih-I Wu, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Shimeng Yu, Meng-Fan Chang:
Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Edge Chips. IEEE J. Solid State Circuits 57(2): 609-624 (2022) - Ping-Chun Wu, Jian-Wei Su, Yen-Lin Chung, Li-Yang Hong, Jin-Sheng Ren, Fu-Chun Chang, Yuan Wu, Ho-Yu Chen, Chen-Hsun Lin, Hsu-Ming Hsiao, Sih-Han Li, Shyh-Shyuan Sheu, Shih-Chieh Chang, Wei-Chung Lo, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Chih-I Wu, Meng-Fan Chang:
A 28nm 1Mb Time-Domain Computing-in-Memory 6T-SRAM Macro with a 6.6ns Latency, 1241GOPS and 37.01TOPS/W for 8b-MAC Operations for Edge-AI Devices. ISSCC 2022: 1-3 - Wei Ying Yi, Peng-Fei Liu, Sheung-Lai Lo, Ya-Fen Chan, Yu Zhou, Yee Leung, Kam-Sang Woo, Alex Pui-Wai Lee, Jia-Min Chen, Kwong-Sak Leung:
Towards Personalized Healthcare in Cardiac Population: The Development of a Wearable ECG Monitoring System, an ECG Lossy Compression Schema, and a ResNet-Based AF Detector. CoRR abs/2207.05138 (2022) - 2021
- Chih-Sheng Lin, Fu-Cheng Tsai, Jian-Wei Su, Sih-Han Li, Tian-Sheuan Chang, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Chih-I Wu, Tuo-Hung Hou:
A 48 TOPS and 20943 TOPS/W 512kb Computation-in-SRAM Macro for Highly Reconfigurable Ternary CNN Acceleration. A-SSCC 2021: 1-3 - Jian-Wei Su, Yen-Chi Chou, Ruhui Liu, Ta-Wei Liu, Pei-Jung Lu, Ping-Chun Wu, Yen-Lin Chung, Li-Yang Hung, Jin-Sheng Ren, Tianlong Pan, Sih-Han Li, Shih-Chieh Chang, Shyh-Shyuan Sheu, Wei-Chung Lo, Chih-I Wu, Xin Si, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang:
16.3 A 28nm 384kb 6T-SRAM Computation-in-Memory Macro with 8b Precision for AI Edge Chips. ISSCC 2021: 250-252 - 2020
- Jau-Yang Chang, Jin-Tsong Jeng, Yung-Hoh Sheu, Z.-Jie Jian, Wei-Yeh Chang:
An efficient data collection path planning scheme for wireless sensor networks with mobile sinks. EURASIP J. Wirel. Commun. Netw. 2020(1): 257 (2020) - Ko-Tsung Chu, Hua-Ting Hsu, Jyh-Jian Sheu, Wei-Pang Yang, Cheng-Chi Lee:
Effective spam filter based on a hybrid method of header checking and content parsing. IET Networks 9(6): 338-347 (2020) - Yen-Cheng Chiu, Zhixiao Zhang, Jia-Jing Chen, Xin Si, Ruhui Liu, Yung-Ning Tu, Jian-Wei Su, Wei-Hsing Huang, Jing-Hong Wang, Wei-Chen Wei, Je-Min Hung, Shyh-Shyuan Sheu, Sih-Han Li, Chih-I Wu, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang:
A 4-Kb 1-to-8-bit Configurable 6T SRAM-Based Computation-in-Memory Unit-Macro for CNN-Based AI Edge Processors. IEEE J. Solid State Circuits 55(10): 2790-2801 (2020) - Jian-Wei Su, Xin Si, Yen-Chi Chou, Ting-Wei Chang, Wei-Hsing Huang, Yung-Ning Tu, Ruhui Liu, Pei-Jung Lu, Ta-Wei Liu, Jing-Hong Wang, Zhixiao Zhang, Hongwu Jiang, Shanshi Huang, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Shyh-Shyuan Sheu, Sih-Han Li, Heng-Yuan Lee, Shih-Chieh Chang, Shimeng Yu, Meng-Fan Chang:
15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips. ISSCC 2020: 240-242 - 2019
- Tony W. H. Sheu, C. Y. Kao, Yu-Wei Chang, Jia-Han Li:
Prediction of evanescent coupling efficiency in two parallel silica nanowires. Comput. Math. Appl. 78(3): 707-722 (2019) - Xin Si, He Qian, Meng-Fan Chang, Cheng-Xin Xue, Jian-Wei Su, Zhixiao Zhang, Sih-Han Li, Shyh-Shyuan Sheu, Heng-Yuan Lee, Ping-Cheng Chen, Huaqiang Wu:
Circuit Design Challenges in Computing-in-Memory for AI Edge Devices. ASICON 2019: 1-4 - Zhixiao Zhang, Jia-Jing Chen, Xin Si, Yung-Ning Tu, Jian-Wei Su, Wei-Hsing Huang, Jing-Hong Wang, Wei-Chen Wei, Yen-Cheng Chiu, Je-Min Hong, Shyh-Shyuan Sheu, Sih-Han Li, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang:
A 55nm 1-to-8 bit Configurable 6T SRAM based Computing-in-Memory Unit-Macro for CNN-based AI Edge Processors. A-SSCC 2019: 217-218 - Chih-Cheng Chang, Ming-Hung Wu, Jia-Wei Lin, Chun-Hsien Li, Vivek Parmar, Heng-Yuan Lee, Jeng-Hua Wei, Shyh-Shyuan Sheu, Manan Suri, Tian-Sheuan Chang, Tuo-Hung Hou:
NV-BNN: An Accurate Deep Convolutional Neural Network Based on Binary STT-MRAM for Adaptive AI Edge. DAC 2019: 30 - 2017
- Jia-Shing Sheu, Wei-Hsiu Tsai:
Implementation of a following wheel robot featuring stereoscopic vision. Multim. Tools Appl. 76(23): 25161-25177 (2017) - 2016
- Jia-Shing Sheu, Ho-Nien Shou, Wei-Jun Lin:
Realization of an Ethernet-based synchronous audio playback system. Multim. Tools Appl. 75(16): 9797-9818 (2016) - Jyh-Jian Sheu, Yin-Kai Chen, Ko-Tsung Chu, Jih-Hsin Tang, Wei-Pang Yang:
An intelligent three-phase spam filtering method based on decision tree data mining. Secur. Commun. Networks 9(17): 4013-4026 (2016) - 2013
- Tian-Wei Sheu, Tzu-Liang Chen, Jian-Wei Tzeng, Ching-Pin Tsai, Masatake Nagai:
Study on the Conception of Learning Problems of Students by Combining the Misconception Domain and Structural Analysis Methods. J. Comput. 8(5): 1255-1266 (2013) - Ming-Hsuan Wei, Sheue-Ling Hwang, Hsin-Chang Chang, Jian-Yung Hung, Chih-Chung Kuo:
Ergonomics Design with Novice Elicitation on an Auditory-Only In-Vehicle Speech System. HCI (2) 2013: 654-660 - 2012
- Bor-tyng Wang, Tian-Wei Sheu, Jung-Chin Liang, Jian-Wei Tzeng, Masatake Nagai:
Optimal method for choosing an English coursebook by using GRA and AHP. SII 2012: 558-562 - Zhongyu Chen, Wei Jia, Tsing Chung, Fung Jacky Wen, Yuk Tak Chow, Po Sheun Chung:
Novel multiplexed coaxial holographic storage technique. Visual Information Processing 2012: 83990U - Chorng-Ren Sheu, Jia-Wei Liu, Chuan-Yuan Huang, Chia-Chi Huang:
A Low Complexity Interference Suppression Scheme for High Mobility STBC-OFDM Systems. VTC Spring 2012: 1-5 - 2011
- Jehn-Ruey Jiang, Jang-Ping Sheu, Ching Tu, Jih-Wei Wu:
An Anonymous Path Routing (APR) Protocol for Wireless Sensor Networks. J. Inf. Sci. Eng. 27(2): 657-680 (2011) - 2010
- Chorng-Ren Sheu, Jia-Wei Liu, Chia-Chi Huang:
A Low Complexity ICI Cancellation Scheme with Multi-Step Windowing and Modified SIC for High-Mobility OFDM Systems. VTC Spring 2010: 1-5 - 2009
- Laung-Terng Wang, Ravi Apte, Shianling Wu, Boryau Sheu, Wen-Ben Jone, Jianghao Guo, Kuen-Jong Lee, Wei-Shin Wang, Xiaoqing Wen, Hao-Jan Chao, Jinsong Liu, Yanlong Niu, Yi-Chih Sung, Chi-Chun Wang, Fangfang Li:
Turbo1500: Core-Based Design for Test and Diagnosis. IEEE Des. Test Comput. 26(1): 26-35 (2009) - 2008
- Laung-Terng Wang, Ravi Apte, Shianling Wu, Boryau Sheu, Kuen-Jong Lee, Xiaoqing Wen, Wen-Ben Jone, Chia-Hsien Yeh, Wei-Shin Wang, Hao-Jan Chao, Jianghao Guo, Jinsong Liu, Yanlong Niu, Yi-Chih Sung, Chi-Chun Wang, Fangfang Li:
Turbo1500: Toward Core-Based Design for Test and Diagnosis Using the IEEE 1500 Standard. ITC 2008: 1-9
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