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Publication search results
found 14 matches
- 2024
- Sundeep Javvaji, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Bert Oude-Essink, Koen Beijens, Kofi A. A. Makinwa, Lucien J. Breems:
A 120-MHz BW, 122-dBFS SFDR CTΔΣ ADC With a Multi-Path Multi-Frequency Chopping Scheme. IEEE J. Solid State Circuits 59(4): 1184-1193 (2024) - 2023
- Sundeep Javvaji, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Bert Oude-Essink, Koen Beijens, Kofi A. A. Makinwa, Lucien J. Breems:
A 6GHz Multi-Path Multi-Frequency Chopping CTΔΣ Modulator achieving 122dBFS SFDR from 150kHz to 120MHz BW. VLSI Technology and Circuits 2023: 1-2 - 2022
- Muhammed Bolatkale, Robert Rutten, Hans Brekelmans, Shagun Bajoria, Yihan Gao, Bernard Burdiek, Lucien J. Breems:
A 28-nm 6-GHz 2-bit Continuous-Time ΔΣ ADC With -101-dBc THD and 120-MHz Bandwidth Using Blind Digital DAC Error Correction. IEEE J. Solid State Circuits 57(12): 3768-3780 (2022) - Qilong Liu, Lucien J. Breems, Shagun Bajoria, Muhammed Bolatkale, Robert Rutten, Georgi I. Radulov:
A 158-mW 360-MHz BW 68-dB DR Continuous-Time 1-1-1 Filtering MASH ADC in 40-nm CMOS. IEEE J. Solid State Circuits 57(12): 3781-3793 (2022) - Pierluigi Cenci, Hans Brekelmans, Shagun Bajoria, Marcello Ganzerli, Bernard Burdiek, Robert Rutten, Yihan Gao, Muhammed Bolatkale, Paul Swinkels, Lucien J. Breems:
A 2GHz 2-bit Continuous-Time Delta Sigma ADC with 2GHz chopper achieving 12nV/sqrt(Hz) 1/f noise at 153kHz and -104.7dBc THD in 30MHz BW. ESSCIRC 2022: 321-324 - Muhammed Bolatkale, Robert Rutten, Hans Brekelmans, Shagun Bajoria, Yihan Gao, Bernard Burdiek, Lucien J. Breems:
A 28nm 6GHz 2b Continuous-Time ΔΣ ADC with -101 dBc THD and 120MHz Bandwidth Using Digital DAC Error Correction. ISSCC 2022: 416-418 - Qilong Liu, Lucien J. Breems, Chenming Zhang, Shagun Bajoria, Muhammed Bolatkale, Robert Rutten, Georgi I. Radulov:
A 5GS/s 360MHz-BW 68dB-DR Continuous-Time 1-1-1 Filtering MASH ΔΣ ADC in 40nm CMOS. ISSCC 2022: 414-416 - 2021
- Chenming Zhang, Lucien J. Breems, Qilong Liu, Georgi I. Radulov, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Arthur H. M. van Roermund:
A 6GS/s 0.5GHz BW continuous-time 2-1-1 MASH ΔΣ modulator with phase-boosted current-mode ELD compensation in 40nm CMOS. ESSCIRC 2021: 491-494 - 2020
- Stijn Ringeling, Loek Steinebach, Qilong Liu, Chenming Zhang, Shagun Bajoria, Muhammed Bolatkale, Lucien J. Breems, Georgi I. Radulov:
Novel Baseband Analog Beamforming through Resistive DACs and Sigma Delta Modulators. ECCTD 2020: 1-4 - Qilong Liu, Lucien J. Breems, Shagun Bajoria, Muhammed Bolatkale, Chenming Zhang, Georgi I. Radulov:
Analysis of the Inter-Stage Signal Leakage in Wide BW Low OSR and High DR CT MASH ΔΣM. ISCAS 2020: 1-5 - 2016
- Lucien J. Breems, Muhammed Bolatkale, Hans Brekelmans, Shagun Bajoria, Jan Niehof, Robert Rutten, Bert Oude-Essink, Franco Fritschij, Jagdip Singh, Gerard Lassche:
A 2.2 GHz Continuous-Time ΔΣ ADC With -102 dBc THD and 25 MHz Bandwidth. IEEE J. Solid State Circuits 51(12): 2906-2916 (2016) - Lucien J. Breems, Muhammed Bolatkale, Hans Brekelmans, Shagun Bajoria, Jan Niehof, Robert Rutten, Bert Oude-Essink, Franco Fritschij, Jagdip Singh, Gerard Lassche:
15.2 A 2.2GHz continuous-time ΔΣ ADC with -102dBc THD and 25MHz BW. ISSCC 2016: 272-273 - 2011
- Shagun Bajoria, Martijn F. Snoeij, Viola Schaffer, Mikhail V. Ivanov, Sijia Wang, Kofi A. A. Makinwa:
A 36V voltage-to-current converter with dynamic element matching and auto-calibration for AC ripple reduction. ESSCIRC 2011: 319-322 - 2008
- Shagun Bajoria, Vineet Kumar Singh, Raju Kunde, Chetan D. Parikh:
Low power high bandwidth amplifier with RC Miller and gain enhanced feedforward compensation. ISLPED 2008: 193-196
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