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Publication search results
found 148 matches
- 2005
- Erkan Acar, Sule Ozev:
Parametric test development for RF circuits targeting physical fault locations and using specification-based fault definitions. ICCAD 2005: 73-79 - Amit Agarwal, Kunhyuk Kang, Kaushik Roy:
Accurate estimation and modeling of total chip leakage considering inter- & intra-die process variations. ICCAD 2005: 736-741 - Anuradha Agarwal, Ranga Vemuri:
Hierarchical performance macromodels of feasible regions for synthesis of analog and RF circuits. ICCAD 2005: 430-436 - Ankur Agiwal, Montek Singh:
An architecture and a wrapper synthesis approach for multi-clock latency-insensitive systems. ICCAD 2005: 1006-1013 - Moayad Fahim Ali, Sean Safarpour, Andreas G. Veneris, Magdy S. Abadir, Rolf Drechsler:
Post-verification debugging of hierarchical designs. ICCAD 2005: 871-876 - Roy Armoni, Sergey Egorov, Ranan Fraer, Dmitry Korchemny, Moshe Y. Vardi:
Efficient LTL compilation for SAT-based model checking. ICCAD 2005: 877-884 - Ali Alphan Bayazit, Sharad Malik:
Complementary use of runtime validation and model checking. ICCAD 2005: 1052-1059 - Murat R. Becer, Vladimir Zolotov, Rajendran Panda, Amir Grinshpon, Ilan Algor, Rafi Levy, Chanhee Oh:
Pessimism reduction in crosstalk noise aware STA. ICCAD 2005: 954-961 - Fernando De Bernardinis, Alberto L. Sangiovanni-Vincentelli:
Efficient analog platform characterization through analog constraint graphs. ICCAD 2005: 415-421 - Sarvesh Bhardwaj, Sarma B. K. Vrudhula:
Formalizing designer's preferences for multiattribute optimization with application to leakage-delay tradeoffs. ICCAD 2005: 713-718 - Per Bjesse, James H. Kukula:
Automatic generalized phase abstraction for formal verification. ICCAD 2005: 1076-1082 - Kapil D. Boianapally, Ting Mei, Jaijeet S. Roychowdhury:
A multi-harmonic probe technique for computing oscillator steady states. ICCAD 2005: 610-613 - Bradley N. Bond, Luca Daniel:
Parameterized model order reduction of nonlinear dynamical systems. ICCAD 2005: 487-494 - David Bordoley, Hieu Nguyen, Mani Soma:
A statistical study of the effectiveness of BIST jitter measurement techniques. ICCAD 2005: 100-107 - Krishnendu Chakrabarty, J. E. Chen:
A cocktail approach on random access scan toward low power and high efficiency test. ICCAD 2005: 94-99 - Jeremy Chan, Sri Parameswaran:
NoCEE: energy macro-model extraction methodology for network on chip routers. ICCAD 2005: 254-259 - M. Frank Chang:
CDMA/FDMA-interconnects for future ULSI communications. ICCAD 2005: 975-978 - Kai-Hui Chang, Valeria Bertacco, Igor L. Markov:
Simulation-based bug trace minimization with BMC-based refinement. ICCAD 2005: 1045-1051 - Kai-Hui Chang, Igor L. Markov, Valeria Bertacco:
Post-placement rewiring and rebuffering by exhaustive search for functional symmetries. ICCAD 2005: 56-63 - Mango Chia-Tso Chao, Seongmoon Wang, Srimat T. Chakradhar, Kwang-Ting Cheng:
Response shaper: a novel technique to enhance unknown tolerance for output response compaction. ICCAD 2005: 80-87 - Satrajit Chatterjee, Alan Mishchenko, Robert K. Brayton, Xinning Wang, Timothy Kam:
Reducing structural bias in technology mapping. ICCAD 2005: 519-526 - Amitabh Chaudhary, Danny Z. Chen, Kevin Whitton, Michael T. Niemier, Ramprasad Ravichandran:
Eliminating wire crossings for molecular quantum-dot cellular automata implementation. ICCAD 2005: 565-571 - Tung-Chieh Chen, Yao-Wen Chang, Shyh-Chang Lin:
IMF: interconnect-driven multilevel floorplanning for large-scale building-module designs. ICCAD 2005: 159-164 - Guilin Chen, Mahmut T. Kandemir:
Code restructuring for improving cache performance of MPSoCs. ICCAD 2005: 271-274 - Guilin Chen, Mahmut T. Kandemir:
Runtime integrity checking for inter-object connections. ICCAD 2005: 303-306 - Guilin Chen, Ozcan Ozturk, Mahmut T. Kandemir, Ibrahim Kolcu:
Integrating loop and data optimizations for locality within a constraint network based framework. ICCAD 2005: 279-282 - Hongyu Chen, Chao-Yang Yeh, Gustavo R. Wilke, Subodh M. Reddy, Hoa-van Nguyen, William W. Walker, Rajeev Murgai:
A sliding window scheme for accurate clock mesh analysis. ICCAD 2005: 939-946 - Ruiming Chen, Hai Zhou:
Efficient algorithms for buffer insertion in general circuits based on network flow. ICCAD 2005: 322-326 - Charles C. Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu:
Fast and efficient phase conflict detection and correction in standard-cell layouts. ICCAD 2005: 149-156 - Minsik Cho, Suhail Ahmed, David Z. Pan:
TACO: temperature aware clock-tree optimization. ICCAD 2005: 582-587
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