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2020 – today
- 2024
[c140]Pietro d'Agostino, Massimo Violante, Gianpaolo Macario:
Optimizing Lstm-Based Temperature Prediction Algorithm for Embedded System Deployment. ETFA 2024: 1-7- [i2]Mohammadreza Amel Solouki
, Shaahin Angizi, Massimo Violante:
Dependability in Embedded Systems: A Survey of Fault Tolerance Methods and Software-Based Mitigation Techniques. CoRR abs/2404.10509 (2024) - 2023
- [j27]Mohammadreza Amel Solouki, Jacopo Sini, Massimo Violante:
An Experimental Evaluation of Control Flow Checking for Automotive Embedded Applications Compliant With ISO 26262. IEEE Access 11: 51185-51198 (2023) - [c139]Mohammadreza Amel Solouki, Jacopo Sini, Massimo Violante:
A New Approach to Selectively Control Flow Checking Methods Compliant with ISO 26262. CF 2023: 215-216 - [c138]Pietro d'Agostino, Massimo Violante, Gianpaolo Macario:
An Embedded Low-Cost Solution for a Fog Computing Device on the Internet of Things. FMEC 2023: 284-291 - [c137]Pietro d'Agostino, Massimo Violante, Gianpaolo Macario:
A user-extensible solution for deploying fog computing in industrial applications. ISIE 2023: 1-6 - [c136]Luigi Pugliese, Michele Guagnano, Sara Groppo, Massimo Violante, Riccardo Groppo:
Rule-based Sleep-Apnea detection algorithm. IWASI 2023: 251-255 - [c135]Jacopo Sini, Mohammadreza Amel Solouki, Massimo Violante:
Guidelines for Implementing Control Flow Checking into Automotive Embedded Applications Developed with C Language. NorCAS 2023: 1-6 - [c134]Francesco Cosimi, Jacopo Sini, Antonio Arena, Massimo Violante:
Novel Control Flow Checking Implementations for Automotive Software. SMACD 2023: 1-4 - [i1]Jacopo Sini, Luigi Pugliese, Sara Groppo, Michele Guagnano, Massimo Violante:
Towards In-Cabin Monitoring: A Preliminary Study on Sensors Data Collection and Analysis. CoRR abs/2309.11890 (2023) - 2022
- [j26]Luigi Pugliese, Massimo Violante, Sara Groppo:
A Novel Algorithm for Detecting the Drowsiness Onset in Real-Time. IEEE Access 10: 42601-42606 (2022) - [j25]Antonio Costantino Marceddu, Luigi Pugliese, Jacopo Sini, Gustavo Ramirez Espinosa, Mohammadreza Amel Solouki, Pietro Chiavassa, Edoardo Giusto, Bartolomeo Montrucchio, Massimo Violante, Francesco De Pace:
A Novel Redundant Validation IoT System for Affective Learning Based on Facial Expressions and Biological Signals. Sensors 22(7): 2773 (2022) - [j24]Jacopo Sini, Andrea Passarino, Stefano Bonicelli, Massimo Violante:
A Simulation-Based Approach to Aid Development of Software-Based Hardware Failure Detection and Mitigation Algorithms of a Mobile Robot System. Sensors 22(13): 4665 (2022) - [c133]Mohammadreza Amel Solouki, Jacopo Sini, Massimo Violante:
Effectiveness of Control Flow Checking Algorithms Using a Model-Based Software Design Approach: An Empirical Study. ICECS 2022 2022: 1-4 - [c132]Antonio Costantino Marceddu, Jacopo Sini, Bartolomeo Montrucchio, Massimo Violante:
Use of Facial Expressions to Improve the Social Acceptance of Level 4 and 5 Automated Driving System Equipped Vehicles. SoftCOM 2022: 1-3 - 2020
- [c131]Jacopo Sini, M. D'Auria, Massimo Violante:
Towards Vehicle-Level Simulator Aided Failure Mode, Effect, and Diagnostic Analysis of Automotive Power Electronics Items. LATS 2020: 1-6
2010 – 2019
- 2019
- [j23]Serhiy Avramenko, Massimo Violante:
RTOS Solution for NoC-Based COTS MPSoC Usage in Mixed-Criticality Systems. J. Electron. Test. 35(1): 29-44 (2019) - [c130]Jacopo Sini, Massimo Violante, V. Dodde, R. Gnaniah, L. Pecorella:
A Novel Simulation-Based Approach for ISO 26262 Hazard Analysis and Risk Assessment. IOLTS 2019: 253-254 - 2018
- [c129]Serhiy Avramenko, Siavoosh Payandeh Azad, Stefano Esposito, Behrad Niazmand, Massimo Violante, Jaan Raik, Maksim Jenihhin:
QoSinNoC: Analysis of QoS-Aware NoC Architectures for Mixed-Criticality Applications. DDECS 2018: 67-72 - [c128]Jacopo Sini, A. Mugoni, Massimo Violante, A. Quario, C. Argiri, F. Fusetti:
An automatic approach to integration testing for critical automotive software. DTIS 2018: 1-2 - [c127]Jacopo Sini, Massimo Violante, Riccardo Dessì:
Computer-Aided Design of Multi-Agent Cyber-Physical Systems. ETFA 2018: 677-684 - [c126]Jacopo Sini, Massimo Violante:
An Automatic Approach to Perform FMEDA Safety Assessment on Hardware Designs. IOLTS 2018: 49-52 - [c125]Stefano Esposito, Serhiy Avramenko, Massimo Violante:
Efficient Software-Based Partitioning for Commercial-off-the-Shelf NoC-based MPSoCs for Mixed-Criticality Systems. IOLTS 2018: 189-194 - [c124]Stefano Esposito, Jacopo Sini, Massimo Violante:
Real-Time Validation of Fault-Tolerant Mixed-Criticality Systems. IOLTS 2018: 245-246 - [c123]Jacopo Sini, Matteo Sonza Reorda, Massimo Violante, Peter Sarson:
Towards an automatic approach for hardware verification according to ISO 26262 functional safety standard. IOLTS 2018: 287-290 - [c122]Stefano Esposito, Serhiy Avramenko, Massimo Violante:
RTOS for mixed criticality applications deployed on NoC-based COTS MPSoC. LATS 2018: 1-6 - [c121]Stefano Esposito, Jacopo Sini, Massimo Violante:
Real-time validation of mixed-criticality applications. LATS 2018: 1-6 - [c120]Serhiy Avramenko, Siavoosh Payandeh Azad, Behrad Niazmand, Massimo Violante, Jaan Raik, Maksim Jenihhin:
Upgrading QoSinNoC: Efficient Routing for Mixed-Criticality Applications and Power Analysis. VLSI-SoC 2018: 207-212 - [c119]Wim Dobbelaere, On Semi, Massimo Violante, Turin Polytechnic, Jeff Rearick:
Innovative practices on quality levels of A/MS devices. VTS 2018: 1 - 2017
- [j22]Serhiy Avramenko, Matteo Sonza Reorda, Massimo Violante, Görschwin Fey:
A High-Level Approach to Analyze the Effects of Soft Errors on Lossless Compression Algorithms. J. Electron. Test. 33(1): 53-64 (2017) - [j21]Stefano Esposito, Massimo Violante:
On the Consolidation of Mixed Criticalities Applications on Multicore Architectures. J. Electron. Test. 33(1): 65-76 (2017) - [j20]Stefano Esposito, Massimo Violante, Marco Sozzi, Marco Terrone, Massimo Traversone:
A Novel Method for Online Detection of Faults Affecting Execution-Time in Multicore-Based Systems. ACM Trans. Embed. Comput. Syst. 16(4): 94:1-94:19 (2017) - [c118]Jacopo Sini, Antonio Costantino Marceddu, Massimo Violante, Riccardo Dessì:
Passengers' Emotions Recognition to Improve Social Acceptance of Autonomous Driving Vehicles. IIH-MSP (1) 2017: 25-32 - [c117]Stefano Esposito, Massimo Violante:
Deterministic network on chip for deploying real time applications on many-core processors. IOLTS 2017: 21-24 - [c116]Tino Flenker, Jan Malburg, Görschwin Fey, Serhiy Avramenko, Massimo Violante, Matteo Sonza Reorda:
Towards Making Fault Injection on Abstract Models a More Accurate Tool for Predicting RT-Level Effects. ISVLSI 2017: 533-538 - [c115]Enea Bagalini, Jacopo Sini, Matteo Sonza Reorda, Massimo Violante, H. Klimesch, Peter Sarson:
An automatic approach to perform the verification of hardware designs according to the ISO26262 functional safety standard. LATS 2017: 1-6 - 2016
- [c114]Paolo Gai, Massimo Violante:
Automotive embedded software architecture in the multi-core age. ETS 2016: 1-8 - [c113]Serhiy Avramenko, Matteo Sonza Reorda, Massimo Violante, Görschwin Fey, Jan-Gerd Mess, Robert Schmidt:
On the robustness of DCT-based compression algorithms for space applications. IOLTS 2016: 1-2 - [c112]Stefano Esposito, Massimo Violante, Marco Sozzi, Marco Terrone, Massimo Traversone:
Online time interference detection in mixed-criticality applications on multicore architectures using performance counters. IOLTS 2016: 213-214 - [c111]Serhiy Avramenko, Matteo Sonza Reorda, Massimo Violante, Görschwin Fey:
Analysis of the effects of soft errors on compression algorithms through fault injection inside program variables. LATS 2016: 14-19 - [c110]Stefano Esposito, Serhiy Avramenko, Massimo Violante:
On the consolidation of mixed criticalities applications on multicore architectures. LATS 2016: 57-62 - 2015
- [j19]Enea Bagalini, Massimo Violante:
Designing Autonomous Race Car Models for Learning Advanced Topics in Hard Real-Time System. Int. J. Robotics Appl. Technol. 3(1): 1-22 (2015) - [c109]Enea Bagalini, Massimo Violante, H. Hakobyan:
Evaluation of error effects on a biomedical system. EWDTS 2015: 1-4 - [c108]Serhiy Avramenko, Stefano Esposito, Massimo Violante, Marco Sozzi, Massimo Traversone, Marco Binello, Marco Terrone:
An Hybrid Architecture for consolidating mixed criticality applications on multicore systems. IOLTS 2015: 26-29 - 2014
- [c107]Hakob Hakobyan, Paolo Rech, Matteo Sonza Reorda, Massimo Violante:
Early reliability evaluation of a biomédical system. IDT 2014: 45-50 - 2013
- [j18]Prashant D. Joshi, Massimo Violante:
Guest Editorial. J. Electron. Test. 29(3): 259-260 (2013) - [c106]Khaled Benkrid, Didier Keymeulen, David Merodio, Michael Newell, Rainer Wansch, Umeshkumar D. Patel, Ahmet T. Erdogan, Niels Hadaschik, Luca Sterpone, Jelle Poupaert, Massimo Violante:
Preface. AHS 2013 - [c105]Nikos Andrikos, Massimo Violante, David Merodio Codinachs:
A fully-automated flow for ITAR-free rad-hard Atmel FPGAs. IOLTS 2013: 187-192 - 2012
- [c104]Salvatore Campagna, Massimo Violante:
An hybrid architecture to detect transient faults in microprocessors: An experimental validation. DATE 2012: 1433-1438 - [c103]Cristiana Bolchini, Antonio Miele, Chiara Sandionigi, Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, Cecilia Metra, Martin Omaña, Daniele Rossi, Matteo Sonza Reorda, Luca Sterpone, Massimo Violante, Simone Gerardin, Marta Bagatin, Alessandro Paccagnella:
High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies. DFT 2012: 121-125 - [c102]Ahmad Din, Basilio Bona, Joel Morrissette, Moazzam Hussain, Massimo Violante, M. Fawad Naseem:
Embedded Low Power Controller for Autonomous Landing of UAV Using Artificial Neural Network. FIT 2012: 196-203 - 2011
- [b2]Niccolò Battezzati, Luca Sterpone, Massimo Violante:
Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications. Springer 2011, ISBN 978-1-4419-7594-2, pp. I-VII, 1-220 - [j17]Hipólito Guzmán-Miranda, Luca Sterpone, Massimo Violante, Miguel A. Aguirre, Manuel Gutiérrez-Rizo:
Coping With the Obsolescence of Safety- or Mission-Critical Embedded Systems Using FPGAs. IEEE Trans. Ind. Electron. 58(3): 814-821 (2011) - [j16]Massimo Violante, Cristina Meinhardt, Ricardo Reis, Matteo Sonza Reorda:
A Low-Cost Solution for Deploying Processor Cores in Harsh Environments. IEEE Trans. Ind. Electron. 58(7): 2617-2626 (2011) - [c101]Salvatore Campagna, Moazzam Hussain, Massimo Violante:
A Light-Weight Fault Tolerance Framework for Space Computing using COTS Components. ARCS Workshops 2011 - [c100]Enrico Costenaro, Massimo Violante, Dan Alexandrescu:
A new IP core for fast error detection and fault tolerance in COTS-based solid state mass memories. IOLTS 2011: 49-54 - 2010
- [j15]Gianpiero Cabodi, Marco Murciano, Massimo Violante:
Boosting software fault injection for dependability analysis of real-time embedded applications. ACM Trans. Embed. Comput. Syst. 10(2): 24:1-24:32 (2010) - [c99]Salvatore Campagna, Moazzam Hussain, Massimo Violante:
Hypervisor-Based Virtual Hardware for Fault Tolerance in COTS Processors Targeting Space Applications. DFT 2010: 44-51 - [c98]Cristiana Bolchini, Antonio Miele, Chiara Sandionigi, Niccolò Battezzati, Luca Sterpone, Massimo Violante:
An integrated flow for the design of hardened circuits on SRAM-based FPGAs. ETS 2010: 214-219 - [c97]Salvatore Campagna, Massimo Violante:
A framework to support the design of COTS-based reliable space computers for on-board data handling. IOLTS 2010: 91-96 - [c96]Niccolò Battezzati, Davide Serrone, Massimo Violante:
A new framework for the automatic insertion of mitigation structures in circuits netlists. IOLTS 2010: 190-191 - [c95]Niccolò Battezzati, Luca Sterpone, Massimo Violante, Filomena Decuzzi:
A new software tool for static analysis of SET sensitiveness in Flash-based FPGAs. VLSI-SoC 2010: 79-84
2000 – 2009
- 2009
- [c94]Matteo Sonza Reorda, Massimo Violante, Cristina Meinhardt, Ricardo Reis:
A low-cost SEE mitigation solution for soft-processors embedded in Systems on Pogrammable Chips. DATE 2009: 352-357 - [c93]Francesco Abate, Luca Sterpone, Massimo Violante, Fernanda Lima Kastensmidt:
A study of the Single Event Effects impact on functional mapping within Flash-based FPGAs. DATE 2009: 1226-1229 - [c92]Matteo Sonza Reorda, Massimo Violante, Cristina Meinhardt, Ricardo Reis:
An On-board Data-Handling Computer for Deep-Space Exploration Built Using Commercial-Off-the-Shelf SRAM-Based FPGAs. DFT 2009: 254-262 - [c91]Niccolò Battezzati, Filomena Decuzzi, Luca Sterpone, Massimo Violante:
Soft errors in Flash-based FPGAs: Analysis methodologies and first results. FPL 2009: 723-724 - [c90]Massimo Violante, M. L. Esposti:
A low-cost solution for developing reliable Linux-based space computers for on-board data handling. IOLTS 2009: 49-54 - [c89]Niccolò Battezzati, Filomena Decuzzi, Massimo Violante, Michel Briet:
Application-oriented SEU sensitiveness analysis of Atmel rad-hard FPGAs. IOLTS 2009: 89-94 - [c88]Cristina Meinhardt, Ricardo Reis, Massimo Violante, Matteo Sonza Reorda:
Recovery scheme for hardening system on programmable chips. LATW 2009: 1-6 - [c87]Gianpaolo Macario, Marco Torchiano, Massimo Violante:
An in-vehicle infotainment software architecture based on google android. SIES 2009: 257-260 - 2008
- [j14]Cristiana Bolchini, Antonio Miele, Fabio Rebaudengo, Fabio Salice, Donatella Sciuto, Luca Sterpone, Massimo Violante:
Software and Hardware Techniques for SEU Detection in IP Processors. J. Electron. Test. 24(1-3): 35-44 (2008) - [j13]Eduardo Luis Rhod, Carlos Arthur Lang Lisbôa, Luigi Carro, Matteo Sonza Reorda, Massimo Violante:
Hardware and Software Transparency in the Protection of Programs Against SEUs and SETs. J. Electron. Test. 24(1-3): 45-56 (2008) - [c86]Luca Sterpone, Niccolò Battezzati, Massimo Violante:
A new placement algorithm for the optimization of fault tolerant circuits on reconfigurable devices. WREFT@CF 2008: 347-352 - [c85]Francesco Abate, Massimo Violante:
Coping with Obsolescence of Processor Cores in Critical Applications. DFT 2008: 24-32 - [c84]Niccolò Battezzati, Simone Gerardin, Andrea Manuzzato, Alessandro Paccagnella, Sana Rezgui, Luca Sterpone, Massimo Violante:
On the Evaluation of Radiation-Induced Transient Faults in Flash-Based FPGAs. IOLTS 2008: 135-140 - 2007
- [j12]Luca Sterpone, Matteo Sonza Reorda, Massimo Violante, Fernanda Lima Kastensmidt, Luigi Carro:
Evaluating Different Solutions to Design Fault Tolerant Systems with SRAM-based FPGAs. J. Electron. Test. 23(1): 47-54 (2007) - [c83]Andrea Manuzzato, Paolo Rech, Simone Gerardin, Alessandro Paccagnella, Luca Sterpone, Massimo Violante:
Sensitivity Evaluation of TMR-Hardened Circuits to Multiple SEUs Induced by Alpha Particles in Commercial SRAM-Based FPGAs. DFT 2007: 79-86 - [c82]Salvatore Pontarelli, Luca Sterpone, Gian Carlo Cardarilli, Marco Re, Matteo Sonza Reorda, Adelio Salsano, Massimo Violante:
Optimization of Self Checking FIR filters by means of Fault Injection Analysis. DFT 2007: 96-104 - [c81]Luca Sterpone, Massimo Violante:
Static and Dynamic Analysis of SEU Effects in SRAM-Based FPGAs. ETS 2007: 159-164 - [c80]Luca Sterpone, Massimo Violante:
A new decompression system for the configuration process of SRAM-based FPGAS. ACM Great Lakes Symposium on VLSI 2007: 241-246 - [c79]Luca Sterpone, Massimo Violante:
A new hardware architecture for performing the gridding of DNA microarray images. ACM Great Lakes Symposium on VLSI 2007: 341-346 - [c78]Marco Murciano, Massimo Violante:
Validating the dependability of embedded systems through fault injection by means of loadable kernel modules. HLDVT 2007: 179-186 - [c77]Salvatore Pontarelli, Luca Sterpone, Gian Carlo Cardarilli, Marco Re, Matteo Sonza Reorda, Adelio Salsano, Massimo Violante:
Self Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders. IOLTS 2007: 194-196 - 2006
- [b1]Olga Goloubeva, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
Software-Implemented Hardware Fault Tolerance. Springer 2006, ISBN 978-0-387-26060-0, pp. I-XI, 1-224 - [j11]Julio Pérez Acle, Matteo Sonza Reorda, Massimo Violante:
Early, Accurate Dependability Analysis of CAN-Based Networked Systems. IEEE Des. Test Comput. 23(1): 38-45 (2006) - [j10]Luca Sterpone, Massimo Violante:
Hardening FPGA-based Systems Against SEUs: A New Design Methodology. J. Comput. 1(1): 22-30 (2006) - [j9]Paolo Bernardi, Letícia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante:
A New Hybrid Fault Detection Technique for Systems-on-a-Chip. IEEE Trans. Computers 55(2): 185-198 (2006) - [j8]Luca Sterpone, Massimo Violante:
A New Reliability-Oriented Place and Route Algorithm for SRAM-Based FPGAs. IEEE Trans. Computers 55(6): 732-744 (2006) - [c76]Maurizio Martina, Guido Masera, Andrea Molino, Fabrizio Vacca, Luca Sterpone, Massimo Violante:
A new approach to compress the configuration information of programmable devices. DATE Designers' Forum 2006: 48-51 - [c75]Luca Sterpone, Massimo Violante:
ReCoM: A New Reconfigurable Compute Fabric Architecture for Computation-Intensive Applications. DDECS 2006: 54-58 - [c74]Maurizio Rebaudengo, Luca Sterpone, Massimo Violante, Cristiana Bolchini, Antonio Miele, Donatella Sciuto:
Combined software and hardware techniques for the design of reliable IP processors. DFT 2006: 265-273 - [c73]Carlos Arthur Lang Lisbôa, Luigi Carro, Matteo Sonza Reorda, Massimo Violante:
Online hardening of programs against SEUs and SETs. DFT 2006: 280-290 - [c72]Matteo Sonza Reorda, Luca Sterpone, Massimo Violante, Marta Portela-García, Celia López-Ongil, Luis Entrena:
Fault Injection-based Reliability Evaluation of SoPCs. ETS 2006: 75-82 - [c71]Luca Sterpone, Massimo Violante:
Dependability Evaluation of Transient Fault Effects in Reconfigurable Compute Fabric Devices. IOLTS 2006: 189-190 - [c70]Matteo Sonza Reorda, Massimo Violante:
Hardware-in-the-Loop-Based Dependability Analysis of Automotive Systems. IOLTS 2006: 229-234 - [c69]Marta Portela-García, Luca Sterpone, Celia López-Ongil, Matteo Sonza Reorda, Massimo Violante:
A Fault Injection Environment for SoPC's Embedded Microprocessors. LATW 2006: 68-73 - [c68]Massimiliano Schillaci, Matteo Sonza Reorda, Massimo Violante:
A New Approach to Cope with Single Event Upsets in Processor-based Systems. LATW 2006: 145-150 - [c67]Paolo Bernardi, Letícia Maria Veiras Bolzani, Alberto Manzone, Massimo Osella, Massimo Violante, Matteo Sonza Reorda:
Software-Based On-Line Test of Communication Peripherals in Processor-Based Systems for Automotive Applications. MTV 2006: 3-8 - 2005
- [c66]Luca Sterpone, Massimo Violante:
A design flow for protecting FPGA-based systems against single event upsets. DFT 2005: 436-444 - [c65]Paolo Bernardi, Letícia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
An Integrated Approach for Increasing the Soft-Error Detection Capabilities in SoCs processors. DFT 2005: 445-453 - [c64]Paolo Bernardi, Letícia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante:
On-Line Detection of Control-Flow Errors in SoCs by Means of an Infrastructure IP Core. DSN 2005: 50-58 - [c63]Matteo Sonza Reorda, Luca Sterpone, Massimo Violante:
Multiple errors produced by single upsets in FPGA configuration memory: a possible solution. ETS 2005: 136-141 - [c62]Ernesto Sánchez, Massimiliano Schillaci, Matteo Sonza Reorda, Giovanni Squillero, Luca Sterpone, Massimo Violante:
New evolutionary techniques for test-program generation for complex microprocessor cores. GECCO 2005: 2193-2194 - [c61]Matteo Sonza Reorda, Luca Sterpone, Massimo Violante:
Efficient Estimation of SEU Effects in SRAM-Based FPGAs. IOLTS 2005: 54-59 - [c60]Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante:
Automatic generation of test sets for SBST of microprocessor IP cores. SBCCI 2005: 74-79 - 2004
- [j7]Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
A New Approach to Software-Implemented Fault Tolerance. J. Electron. Test. 20(4): 433-437 (2004) - [j6]Matteo Sonza Reorda, Massimo Violante:
A New Approach to the Analysis of Single Event Transients in VLSI Circuits. J. Electron. Test. 20(5): 511-521 (2004) - [j5]Matteo Sonza Reorda, Massimo Violante:
Efficient analysis of single event transients. J. Syst. Archit. 50(5): 239-246 (2004) - [c59]Ernesto Sánchez, Giovanni Squillero, Massimo Violante:
A local analysis of the genotype-fitness mapping in hardware optimization problems. IEEE Congress on Evolutionary Computation 2004: 871-878 - [c58]Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante:
Automatic Generation of Validation Stimuli for Application-Specific Processors. DATE 2004: 188-193 - [c57]M. Bellato, Paolo Bernardi, D. Bortolato, A. Candelori, M. Ceschia, Alessandro Paccagnella, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, P. Zambolin:
Evaluating the Effects of SEUs Affecting the Configuration Memory of an SRAM-Based FPGA. DATE 2004: 584-589 - [c56]Matteo Sonza Reorda, Massimo Violante:
On-Line Analysis and Perturbation of CAN Networks. DFT 2004: 424-432 - [c55]Ernesto Sánchez, Giovanni Squillero, Massimo Violante:
Exploiting HW Acceleration for Classifying Complex Test Program Generation Problems. EvoWorkshops 2004: 230-239 - [c54]Fulvio Corno, Julio Pérez Acle, Mattia Ramasso, Matteo Sonza Reorda, Massimo Violante:
Validation of the dependability of CAN-based networked systems. HLDVT 2004: 161-164 - [c53]Letícia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante:
Hybrid Soft Error Detection by Means of Infrastructure IP Cores. IOLTS 2004: 79-88 - [c52]Paolo Bernardi, Matteo Sonza Reorda, Luca Sterpone, Massimo Violante:
On the Evaluation of SEU Sensitiveness in SRAM-Based FPGAs. IOLTS 2004: 115-120 - [c51]Fulvio Corno, Julio Pérez Acle, Matteo Sonza Reorda, Massimo Violante:
A multi-level approach to the dependability analysis of networked systems based on the CAN protocol. SBCCI 2004: 71-75 - 2003
- [j4]Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
Accurate Analysis of Single Event Upsets in a Pipelined Microprocessor. J. Electron. Test. 19(5): 577-584 (2003) - [j3]Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
New techniques for efficiently assessing reliability of SOCs. Microelectron. J. 34(1): 53-61 (2003) - [c50]Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
An Accurate Analysis of the Effects of Soft Errors in the Instruction and Data Caches of a Pipelined Microprocessor. DATE 2003: 10602-10607 - [c49]Paolo Bernardi, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
A P1500-Compatible Programmable BIST Approach for the Test of Embedded Flash Memories. DATE 2003: 10720-10725 - [c48]Abdelaziz Ammari, Régis Leveugle, Matteo Sonza Reorda, Massimo Violante:
Detailed Comparison of Dependability Analyses Performed at RT and Gate Levels. DFT 2003: 336-343 - [c47]Julio Pérez, Matteo Sonza Reorda, Massimo Violante:
Dependability Analysis of CAN Networks: An Emulation-Based Approach. DFT 2003: 537- - [c46]Olga Goloubeva, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
Soft-Error Detection Using Control Flow Assertions. DFT 2003: 581-588 - [c45]Matteo Sonza Reorda, Massimo Violante:
Emulation-Based Analysis of Soft Errors in Deep Sub-micron Circuits. FPL 2003: 616-626 - [c44]Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante:
High-level test generation for hardware testing and software validation. HLDVT 2003: 143-148 - [c43]Matteo Sonza Reorda, Massimo Violante:
Accurate and Efficient Analysis of Single Event Transients in VLSI Circuits. IOLTS 2003: 101-105 - [c42]Massimo Violante, M. Ceschia, Matteo Sonza Reorda, Alessandro Paccagnella, Paolo Bernardi, Maurizio Rebaudengo, D. Bortolato, M. Bellato, P. Zambolin, A. Candelori:
Analyzing SEU Effects in SRAM-based FPGAs. IOLTS 2003: 119-123 - [c41]Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante:
An RT-level Concurrent Error Detection Technique for Data Dominated Systems. IOLTS 2003: 159 - [c40]Davide Appello, Paolo Bernardi, Alessandra Fudoli, Maurizio Rebaudengo, Matteo Sonza Reorda, Vincenzo Tancorre, Massimo Violante:
Exploiting Programmable BIST For The Diagnosis of Embedded Memory Cores. ITC 2003: 379-385 - [c39]Julio Pérez, Matteo Sonza Reorda, Massimo Violante:
Accurate Dependability Analysis of CAN-Based Networked Systems. SBCCI 2003: 337-342 - 2002
- [j2]Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
An FPGA-Based Approach for Speeding-Up Fault Injection Campaigns on Safety-Critical Circuits. J. Electron. Test. 18(3): 261-271 (2002) - [c38]Pierluigi Civera, Luca Macchiarulo, Massimo Violante:
A Simplified Gate-Level Fault Model for Crosstalk Effects Analysis. DFT 2002: 31-39 - [c37]Matteo Sonza Reorda, Massimo Violante:
Fault List Compaction through Static Timing Analysis for Efficient Fault Injection Experiments. DFT 2002: 263-274 - [c36]Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
A New Functional Fault Model for FPGA Application-Oriented Testing. DFT 2002: 372-380 - [c35]Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
Simulation-Based Analysis of SEU Effects on SRAM-based FPGAs. FPL 2002: 607-615 - [c34]Matteo Sonza Reorda, Massimo Violante, Nicola Mazzocca, Salvatore Venticinque, Andrea Bobbio, Giuliana Franceschinis:
A hierarchical approach for designing dependable systems. HLDVT 2002: 63-68 - [c33]Gert Jervan, Zebo Peng, Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante:
High-level and hierarchical test sequence generation. HLDVT 2002: 169-174 - [c32]Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
Analysis of SEU Effects in a Pipelined Processor. IOLTW 2002: 112-116 - [c31]Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
A New Approach to Software-Implemented Fault Tolerance. LATW 2002: 22-25 - [c30]Bogdan Nicolescu, Raoul Velazco, Matteo Sonza Reorda, Maurizio Rebaudengo, Massimo Violante:
A Software Fault Tolerance Method for Safety-Critical Systems: Effectiveness and Drawbacks. SBCCI 2002: 101-108 - 2001
- [c29]Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
FPGA-Based Fault Injection for Microprocessor Systems. Asian Test Symposium 2001: 304- - [c28]Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante:
On the test of microprocessor IP cores. DATE 2001: 209-213 - [c27]Ph. Cheynet, Bogdan Nicolescu, Raoul Velazco, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
System safety through automatic high-level code transformations: an experimental evaluation. DATE 2001: 297-301 - [c26]Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
Exploiting FPGA-Based Techniques for Fault Injection Campaigns on VLSI Circuits . DFT 2001: 250-258 - [c25]Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
FPGA-Based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in VLSI Circuits. FPL 2001: 493-502 - [c24]Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
Exploiting FPGA for Accelerating Fault Injection Experiments. IOLTW 2001: 9-13 - [c23]Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Marco Torchiano:
A Source-to-Source Compiler for Generating Dependable Software. SCAM 2001: 35-44 - [c22]Marcello Lajolo, Matteo Sonza Reorda, Massimo Violante:
Early Evaluation Of Bus Interconnects Dependability For System-On-Chip Designs. VLSI Design 2001: 371- - 2000
- [c21]Marcello Lajolo, Luciano Lavagno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
Automatic test bench generation for simulation-based validation. CODES 2000: 136-140 - [c20]Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno:
Evaluating System Dependability in a Co-Design Framework. DATE 2000: 586-590 - [c19]Maurizio Rebaudengo, Matteo Sonza Reorda, Marco Torchiano, Massimo Violante:
An Experimental Evaluation of the Effectiveness of Automatic Rule-Based Transformations for Safety-Critical Applications. DFT 2000: 257-265 - [c18]Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno:
System-level test bench generation in a co-design framework. ETW 2000: 25-30 - [c17]Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante:
CA-CSTP: a new BIST architecture for sequential circuits. ETW 2000: 167-172 - [c16]Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
Prediction of Power Requirements for High-Speed Circuits. EvoWorkshops 2000: 247-254 - [c15]Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno:
Behavioral-level test vector generation for system-on-chip designs. HLDVT 2000: 21-26 - [c14]Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante:
A genetic algorithm-based system for generating test programs for microprocessor IP cores. ICTAI 2000: 195-198 - [c13]Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Ph. Cheynet, Bogdan Nicolescu, Raoul Velazco:
Evaluating the Effectiveness of a Software Fault-Tolerance Technique on RISC- and CISC-Based Architectures. IOLTW 2000: 17- - [c12]B. Parrotta, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
New Techniques for Accelerating Fault Injection in VHDL Descriptions. IOLTW 2000: 61-66 - [c11]Ph. Cheynet, Raoul Velazco, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
Hardening the Software with Respect to Transient Errors: a Method and Experimental Results. LATW 2000: 36-40 - [c10]Marcello Lajolo, Luciano Lavagno, Matteo Sonza Reorda, Massimo Violante:
Early Power Estimation for System-on-Chip Designs. PATMOS 2000: 108-117 - [c9]B. Parrotta, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
Speeding-Up Fault Injection Campaigns in VHDL Models. SAFECOMP 2000: 27-36 - [c8]Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante:
Low Power BIST via Non-Linear Hybrid Cellular Automata. VTS 2000: 29-34
1990 – 1999
- 1999
- [j1]Fulvio Corno, Uwe Gläser, Paolo Prinetto, Matteo Sonza Reorda, Heinrich Theodor Vierhaus, Massimo Violante:
SymFony: a hybrid topological-symbolic ATPG exploiting RT-level information. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(2): 191-202 (1999) - [c7]Maurizio Rebaudengo, Matteo Sonza Reorda, Marco Torchiano, Massimo Violante:
Soft-Error Detection through Software Fault-Tolerance Techniques. DFT 1999: 210-218 - [c6]Fulvio Corno, Matteo Sonza Reorda, Maurizio Rebaudengo, Massimo Violante:
Optimal Vector Selection for Low Power BIST. DFT 1999: 219-226 - [c5]Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
A new BIST architecture for low power circuits. ETW 1999: 160-164 - [c4]Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
Test Pattern Generation Under Low Power Constraints. EvoWorkshops 1999: 162-170 - [c3]Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
ALPS: A Peak Power Estimation Tool for Sequential Circuits. Great Lakes Symposium on VLSI 1999: 350-353 - 1998
- [c2]Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante:
Exploiting Symbolic Techniques for Partial Scan Flip Flop Selection. DATE 1998: 670-677 - 1997
- [c1]Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
Exploiting Logic Simulation to Improve Simulation-based Sequential ATPG. Asian Test Symposium 1997: 68-73
Coauthor Index
[c123] [j22] [c116] [c115] [c113] [c111] [c107] [c103] [j16] [c94] [c92] [c88] [j13] [j12] [c82] [c77] [b1] [j11] [j9] [c73] [c72] [c70] [c69] [c68] [c67] [c65] [c64] [c63] [c62] [c61] [c60] [j7] [j6] [j5] [c58] [c57] [c56] [c54] [c53] [c52] [c51] [j4] [j3] [c50] [c49] [c48] [c47] [c46] [c45] [c44] [c43] [c42] [c41] [c40] [c39] [j2] [c37] [c36] [c35] [c34] [c33] [c32] [c31] [c30] [c29] [c28] [c27] [c26] [c25] [c24] [c23] [c22] [c21] [c20] [c19] [c18] [c17] [c16] [c15] [c14] [c13] [c12] [c11] [c10] [c9] [c8] [j1] [c7] [c6] [c5] [c4] [c3] [c2] [c1]
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