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Pierluigi Nuzzo 0001
Person information
- affiliation: IMEC, Leuven, Belgium
- affiliation (PhD 2007): University of Pisa, Department of Information Engineering, Italy
Other persons with the same name
- Pierluigi Nuzzo — disambiguation page
- Pierluigi Nuzzo 0002 — University of Southern California, Ming Hsieh Department of Electrical and Computer Engineering, LA, USA (and 1 more)
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2010 – 2019
- 2010
- [j4]Pierluigi Nuzzo, Xuening Sun, Chang-Ching Wu, Fernando De Bernardinis, Alberto L. Sangiovanni-Vincentelli:
A Platform-Based Methodology for System-Level Mixed-Signal Design. EURASIP J. Embed. Syst. 2010 (2010)
2000 – 2009
- 2009
- [j3]Vito Giannini, Pierluigi Nuzzo, Charlotte Soens, Kameswaran Vengattaramane, Julien Ryckaert, Michaël Goffioul, Björn Debaillie, Jonathan Borremans, Joris Van Driessche, Jan Craninckx, Mark Ingels:
A 2-mm2 0.1-5 GHz Software-Defined Radio Receiver in 45-nm Digital CMOS. IEEE J. Solid State Circuits 44(12): 3486-3498 (2009) - [c8]Vito Giannini, Pierluigi Nuzzo, Charlotte Soens, Kameswaran Vengattaramane, Michiel Steyaert, Julien Ryckaert, Michaël Goffioul, Björn Debaillie, Joris Van Driessche, Jan Craninckx, Mark Ingels:
A 2mm2 0.1-to-5GHz SDR receiver in 45nm digital CMOS. ISSCC 2009: 408-409 - 2008
- [j2]Pierluigi Nuzzo, Fernando De Bernardinis, Pierangelo Terreni, Geert Van der Plas:
Noise Analysis of Regenerative Comparators for Reconfigurable ADC Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(6): 1441-1454 (2008) - [c7]Vito Giannini, Pierluigi Nuzzo, Vincenzo Chironi, Andrea Baschirotto, Geert Van der Plas, Jan Craninckx:
An 820μW 9b 40MS/s Noise-Tolerant Dynamic-SAR ADC in 90nm Digital CMOS. ISSCC 2008: 238-239 - 2007
- [b1]Pierluigi Nuzzo:
Mixed-Signal Design for Systems-on-Chip: an ADC Perspective. University of Pisa, Italy, 2007 - [j1]Julien Ryckaert, Marian Verhelst, Mustafa Badaroglu, Stefano D'Amico, Vincent De Heyn, Claude Desset, Pierluigi Nuzzo, Bart van Poucke, Piet Wambacq, Andrea Baschirotto, Wim Dehaene, Geert Van der Plas:
A CMOS Ultra-Wideband Receiver for Low Data-Rate Communication. IEEE J. Solid State Circuits 42(11): 2515-2527 (2007) - 2006
- [c6]Pierluigi Nuzzo, Geert Van der Plas, Fernando De Bernardinis, Liesbet Van der Perre, Bert Gyselinckx, Pierangelo Terreni:
A 10.6mW/0.8pJ power-scalable 1GS/s 4b ADC in 0.18mum CMOS with 5.8GHz ERBW. DAC 2006: 873-878 - [c5]Vito Giannini, Pierluigi Nuzzo, Fernando De Bernardinis, Jan Craninckx, Boris Come, Stefano D'Amico, Andrea Baschirotto:
A synthesis tool for power-efficient base-band filter design. DATE 2006: 162-163 - [c4]Fernando De Bernardinis, Pierluigi Nuzzo, Alberto L. Sangiovanni-Vincentelli:
Robust system level design with analog platforms. ICCAD 2006: 334-341 - [c3]Julien Ryckaert, Mustafa Badaroglu, Vincent De Heyn, Geert Van der Plas, Pierluigi Nuzzo, Andrea Baschirotto, Stefano D'Amico, Claude Desset, Hans Suys, Michael Libois, Bart van Poucke, Piet Wambacq, Bert Gyselinckx:
A 16mA UWB 3-to-5GHz 20Mpulses/s Quadrature Analog Correlation Receiver in 0.18µm CMOS. ISSCC 2006: 368-377 - 2005
- [c2]Fernando De Bernardinis, Pierluigi Nuzzo, Alberto L. Sangiovanni-Vincentelli:
Mixed signal design space exploration through analog platforms. DAC 2005: 875-880 - [c1]Fernando De Bernardinis, Pierluigi Nuzzo, Pierangelo Terreni, Alberto L. Sangiovanni-Vincentelli:
Enriching an analog platform for analog-to-digital converter design. ISCAS (2) 2005: 1286-1289
Coauthor Index
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