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Author search results
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- Sudhakar Yalamanchili
aka: Sudha Yalamanchili
Georgia Institute of Technology, Atlanta, USA
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Publication search results
found 183 matches
- 2021
- Bahar Asgari, Ramyad Hadidi, Tushar Krishna, Hyesoon Kim, Sudhakar Yalamanchili:
Efficiently Solving Partial Differential Equations in a Partially Reconfigurable Specialized Hardware. IEEE Trans. Computers 70(4): 524-538 (2021) - Bahar Asgari, Saibal Mukhopadhyay, Sudhakar Yalamanchili:
MAHASIM: Machine-Learning Hardware Acceleration Using a Software-Defined Intelligent Memory System. J. Signal Process. Syst. 93(6): 659-675 (2021) - He Xiao, Monodeep Kar, Saibal Mukhopadhyay, Sudhakar Yalamanchili:
VDPred: Predicting Voltage Droop for Power-Effient 3D Multi-core Processor Design. ICCAE 2021: 83-88 - 2020
- Blaise-Pascal Tine, Sudhakar Yalamanchili, Hyesoon Kim:
Tango: An Optimizing Compiler for Just-In-Time RTL Simulation. DATE 2020: 157-162 - Bahar Asgari, Ramyad Hadidi, Tushar Krishna, Hyesoon Kim, Sudhakar Yalamanchili:
ALRESCHA: A Lightweight Reconfigurable Sparse-Computation Accelerator. HPCA 2020: 249-260 - Maciej Besta, Syed Minhaj Hassan, Sudhakar Yalamanchili, Rachata Ausavarungnirun, Onur Mutlu, Torsten Hoefler:
Slim NoC: A Low-Diameter On-Chip Network Topology for High Energy Efficiency and Scalability. CoRR abs/2010.10683 (2020) - 2019
- Saibal Mukhopadhyay, Yun Long, Burhan Ahmad Mudassar, C. S. Nair, Bartlet H. DeProspo, Hakki Mert Torun, M. Kathaperumal, V. Smet, Duckhwan Kim, Sudhakar Yalamanchili, Madhavan Swaminathan:
Heterogeneous integration for artificial intelligence: Challenges and opportunities. IBM J. Res. Dev. 63(6): 4:1 (2019) - Bahar Asgari, Ramyad Hadidi, Hyesoon Kim, Sudhakar Yalamanchili:
ERIDANUS: Efficiently Running Inference of DNNs Using Systolic Arrays. IEEE Micro 39(5): 46-54 (2019) - Blaise-Pascal Tine, Sudhakar Yalamanchili, Hyesoon Kim, Jeffrey S. Vetter:
POSTER: Tango: An Optimizing Compiler for Just-In-Time RTL Simulation. PACT 2019: 481-482 - Bahar Asgari, Ramyad Hadidi, Hyesoon Kim, Sudhakar Yalamanchili:
LODESTAR: Creating Locally-Dense CNNs for Efficient Inference on Systolic Arrays. DAC 2019: 233 - 2018
- Xinwei Chen, Yorai Wardi, Sudhakar Yalamanchili:
Instruction-throughput regulation in computer processors with data-center applications. Discret. Event Dyn. Syst. 28(1): 127-158 (2018) - Duckhwan Kim, Taesik Na, Sudhakar Yalamanchili, Saibal Mukhopadhyay:
DeepTrain: A Programmable Embedded Platform for Training Deep Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(11): 2360-2370 (2018) - Maciej Besta, Syed Minhaj Hassan, Sudhakar Yalamanchili, Rachata Ausavarungnirun, Onur Mutlu, Torsten Hoefler:
Slim NoC: A Low-Diameter On-Chip Network Topology for High Energy Efficiency and Scalability. ASPLOS 2018: 43-55 - Yun Long, Taesik Na, Prakshi Rastogi, Karthik Rao, Asif Islam Khan, Sudhakar Yalamanchili, Saibal Mukhopadhyay:
A ferroelectric FET based power-efficient architecture for data-intensive computing. ICCAD 2018: 32 - Bahar Asgari, Saibal Mukhopadhyay, Sudhakar Yalamanchili:
Memory Slices: A Modular Building Block for Scalable, Intelligent Memory Systems. CoRR abs/1803.06068 (2018) - Karthik Rao, William J. Song, Yorai Wardi, Sudhakar Yalamanchili:
TRINITY: Coordinated Performance, Energy and Temperature Management in 3D Processor-Memory Stacks. CoRR abs/1808.09087 (2018) - 2017
- Xinwei Chen, Yorai Wardi, Sudhakar Yalamanchili:
Power regulation in high performance multicore processors. CDC 2017: 2674-2679 - Karthik Rao, Jun Wang, Sudhakar Yalamanchili, Yorai Wardi, Handong Ye:
Application-Specific Performance-Aware Energy Optimization on Android Mobile Devices. HPCA 2017: 169-180 - Ramyad Hadidi, Bahar Asgari, Burhan Ahmad Mudassar, Saibal Mukhopadhyay, Sudhakar Yalamanchili, Hyesoon Kim:
Demystifying the characteristics of 3D-stacked memories: A case study for Hybrid Memory Cube. IISWC 2017: 66-75 - Chad D. Kersey, Hyesoon Kim, Sudhakar Yalamanchili:
Lightweight SIMT core designs for intelligent 3D stacked DRAM. MEMSYS 2017: 49-59 - Blaise-Pascal Tine, Sudhakar Yalamanchili:
Pagevault: securing off-chip memory using page-based authentication. MEMSYS 2017: 293-304 - Ramyad Hadidi, Bahar Asgari, Burhan Ahmad Mudassar, Saibal Mukhopadhyay, Sudhakar Yalamanchili, Hyesoon Kim:
Demystifying the Characteristics of 3D-Stacked Memories: A Case Study for Hybrid Memory Cube. CoRR abs/1706.02725 (2017) - X. Chen, Yorai Wardi, Sudhakar Yalamanchili:
Power Regulation in High Performance Multicore Processors. CoRR abs/1709.04859 (2017) - Duckhwan Kim, Taesik Na, Sudhakar Yalamanchili, Saibal Mukhopadhyay:
NeuroTrainer: An Intelligent Memory Module for Deep Learning Training. CoRR abs/1710.04347 (2017) - 2016
- He Xiao, Wen Yueh, Saibal Mukhopadhyay, Sudhakar Yalamanchili:
Thermally Adaptive Cache Access Mechanisms for 3D Many-Core Architectures. IEEE Comput. Archit. Lett. 15(2): 129-132 (2016) - Jun Wang, Zhenjiang Dong, Sudhakar Yalamanchili, George F. Riley:
FNM: An Enhanced Null-Message Algorithm for Parallel Simulation of Multicore Systems. ACM Trans. Model. Comput. Simul. 26(2): 11:1-11:26 (2016) - William J. Song, Saibal Mukhopadhyay, Sudhakar Yalamanchili:
Amdahl's law for lifetime reliability scaling in heterogeneous multicore processors. HPCA 2016: 594-605 - Duckhwan Kim, Jaeha Kung, Sek M. Chai, Sudhakar Yalamanchili, Saibal Mukhopadhyay:
Neurocube: A Programmable Digital Neuromorphic Architecture with High-Density 3D Memory. ISCA 2016: 380-392 - Jin Wang, Norm Rubin, Albert Sidelnik, Sudhakar Yalamanchili:
LaPerm: Locality Aware Scheduler for Dynamic Parallelism on GPUs. ISCA 2016: 583-595 - Syed Minhaj Hassan, Sudhakar Yalamanchili:
Understanding the Impact of Air and Microfluidics Cooling on Performance of 3D Stacked Memory Systems. MEMSYS 2016: 387-394
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