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Publication search results
found 152 matches
- 1996
- Jay K. Adams, Donald E. Thomas:
The Design of Mixed Hardware/Software Systems. DAC 1996: 515-520 - Narayan R. Aluru, V. B. Nadkarni, James White:
A Parallel Precorrected FFT Based Capacitance Extraction Program for Signal Integrity Analysis. DAC 1996: 363-366 - Guido Araujo, Sharad Malik, Mike Tien-Chien Lee:
Using Register-Transfer Paths in Code Generation for Heterogeneous Memory-Register Architectures. DAC 1996: 591-596 - Felice Balarin, Harry Hsieh, Attila Jurecska, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Formal Verification of Embedded Systems based on CFSM Networks. DAC 1996: 568-571 - Cyrus Bamji, Enrico Malavasi:
Enhanced Network Flow Algorithm for Yield Optimization. DAC 1996: 746-751 - Bulent Basaran, Rob A. Rutenbar:
An O(n) Algorithm for Transistor Stacking with Performance Constraints. DAC 1996: 221-226 - Ilan Beer, Shoham Ben-David, Cindy Eisner, Avner Landver:
RuleBase: An Industry-Oriented Formal Verification Tool. DAC 1996: 655-660 - Elisabeth Berrebi, Polen Kission, Serge Vernalde, S. De Troch, Jean-Claude Herluison, Jean Fréhel, Ahmed Amine Jerraya, Ivo Bolsens:
Combined Control Flow Dominated and Data Flow Dominated High-Level Synthesis. DAC 1996: 573-578 - Nguyen-Ngoc Bình, Masaharu Imai, Akichika Shiomi, Nobuyuki Hikichi:
A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts. DAC 1996: 527-532 - Alessandro Bogliolo, Luca Benini, Bruno Riccò:
Power Estimation of Cell-Based CMOS Circuits. DAC 1996: 433-438 - Carsten Borchers, Lars Hedrich, Erich Barke:
Equation-Based Behavioral Model Generation for Nonlinear Analog Circuits. DAC 1996: 236-239 - Stephen Dean Brown, Naraig Manjikian, Zvonko G. Vranesic, S. Caranci, A. Grbic, R. Grindley, M. Gusat, K. Loveless, Zeljko Zilic, Sinisa Srbljic:
Experience in Designing a Large-scale Multiprocessor using Field-Programmable Devices and Advanced CAD Tools. DAC 1996: 427-432 - Randal E. Bryant:
Bit-Level Analysis of an SRT Divider Circuit. DAC 1996: 661-665 - Jerry R. Burch:
Techniques for Verifying Superscalar Microprocessors. DAC 1996: 552-557 - Luc Burgun, Frédéric Reblewski, Gérard Fenelon, Jean Barbier, Olivier Lepape:
Serial Fault Emulation. DAC 1996: 801-806 - Raul Camposano:
Behavioral Synthesis. DAC 1996: 33-34 - L. Richard Carley, Georges G. E. Gielen, Rob A. Rutenbar, Willy M. C. Sansen:
Synthesis Tools for Mixed-Signal ICs: Progress on Frontend and Backend Strategies. DAC 1996: 298-303 - Françoise Casaubieilh, Anthony McIsaac, Mike Benjamin, Mike Bartley, François Pogodalla, Frédéric Rocheteau, Mohamed Belhadj, Jeremy Eggleton, Gérard Mas, Geoff Barrett, Christian Berthet:
Functional Verification Methodology of Chameleon Processor. DAC 1996: 421-426 - Anantha P. Chandrakasan, Isabel Y. Yang, Carlin Vieri, Dimitri A. Antoniadis:
Design Considerations and Tools for Low-voltage Digital System Design. DAC 1996: 113-118 - V. Chandramouli, Karem A. Sakallah:
Modeling the Effects of Temporal Proximity of Input Transitions on Gate Propagation Delay and Transition Time. DAC 1996: 617-622 - Chung-Ping Chen, Yao-Wen Chang, D. F. Wong:
Fast Performance-Driven Optimization for Buffered Clock Trees Based on Lagrangian Relaxation. DAC 1996: 405-408 - Chung-Ping Chen, Yao-Ping Chen, D. F. Wong:
Optimal Wire-Sizing Formular Under the Elmore Delay Model. DAC 1996: 487-490 - Chih-Ang Chen, Sandeep K. Gupta:
A Satisfiability-Based Test Generator for Path Delay Faults in Combinational Circuts. DAC 1996: 209-214 - Danny Z. Chen, Xiaobo Hu:
Efficient Approximation Algorithms for Floorplan Area Minimization. DAC 1996: 483-486 - Chau-Shen Chen, Kuang-Hui Lin, TingTing Hwang:
Layout Driven Selecting and Chaining of Partial Scan. DAC 1996: 262-267 - Xiangfeng Chen, Peichen Pan, C. L. Liu:
Desensitization for Power Reduction in Sequential Circuits. DAC 1996: 795-800 - De-Sheng Chen, Majid Sarrafzadeh:
An Exact Algorithm for Low Power Library-Specific Gate Re-Sizing. DAC 1996: 783-788 - David Ihsin Cheng, Kwang-Ting Cheng, Deborah C. Wang, Malgorzata Marek-Sadowska:
A New Hybrid Methodology for Power Estimation. DAC 1996: 439-444 - Yi-Kan Cheng, Chin-Chi Teng, Abhijit Dharchoudhury, Elyse Rosenbaum, Sung-Mo Kang:
iCET: A Complete Chip-Level Thermal Reliability Diagnosis Tool for CMOS VLSI Chips. DAC 1996: 548-551 - Edmund M. Clarke, Manpreet Khaira, Xudong Zhao:
Word Level Model Checking - Avoiding the Pentium FDIV Error. DAC 1996: 645-648
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