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2020 – today
- 2022
[j26]Jingmin Yang
, Trong-Yen Lee, Wen-Ta Lee, Li Xu:
Construction and Implementation of Wireless Network Online Learning System Based on Edge Computing. Int. J. Emerg. Technol. Learn. 17(21): 275-295 (2022)- [j25]Jingmin Yang, Trong-Yen Lee, Wen-Ta Lee, Li Xu:
A Design and Application of Municipal Service Platform Based on Cloud-Edge Collaboration for Smart Cities. Sensors 22(22): 8784 (2022) - 2021
- [j24]Jingmin Yang, Trong-Yen Lee, Wenjie Zhang:
Smart Cities in China: A Brief Overview. IT Prof. 23(3): 89-94 (2021) - [j23]Trong-Yen Lee, Yen-Lin Chen, Yu-Cheng Fan:
Next-Generation Electronics and Sensing Technology. Sensors 21(23): 7958 (2021) - [j22]Trong-Yen Lee, I-An Lin, Jui-Yuan Yu, Jing-min Yang, Yu-Chun Chang:
High Efficiency Disease Detection for Potato Leaf with Convolutional Neural Network. SN Comput. Sci. 2(4): 297 (2021) - 2020
- [j21]Trong-Yen Lee, I-An Lin, Ren-Hong Liao:
Design of a FlexRay/Ethernet Gateway and Security Mechanism for In-Vehicle Networks. Sensors 20(3): 641 (2020)
2010 – 2019
- 2019
- [j20]Jingmin Yang, Trong-Yen Lee, Baoxing Chen, Wenjie Zhang:
A Comprehensive Teaching Reform Model for a Computer Networks Course Based on Integrated Information Systems. Int. J. Emerg. Technol. Learn. 14(18): 76-91 (2019) - [c34]Trong-Yen Lee, Po-Hsuan Hung, Ju-Tse Tsai, I-An Lin:
Personalized ACC System for Smart Vehicles. ICCE-TW 2019: 1-2 - 2018
- [j19]Trong-Yen Lee, I-An Lin, Jun-Jie Wang, Ju-Tse Tsai:
A Reliability Scheduling Algorithm for the Static Segment of FlexRay on Vehicle Networks. Sensors 18(11): 3783 (2018) - 2017
- [c33]Trong-Yen Lee, Chia-Wei Kuo, I-An Lin:
High performance CAN/FlexRay gateway design for in-vehicle network. DSC 2017: 240-242 - 2016
- [j18]Trong-Yen Lee, Chi-Han Huang, Min-Jea Liu, Jhen-Syuan Chen:
Adaptive instruction codec architecture design for network-on-chip. Comput. Electr. Eng. 51: 207-224 (2016) - [j17]Trong-Yen Lee, Chi-Han Huang, Wei-Cheng Chen, Min-Jea Liu:
A low-area dynamic reconfigurable MDC FFT processor design. Microprocess. Microsystems 42: 227-234 (2016) - 2015
- [c32]Trong-Yen Lee, Kuang-Hua Chang, Chi-Han Huang, Cheng-Hsiu Kang, Min-Jea Liu:
Power-saving dynamic allocati on strategy for clouding server. ICCE-TW 2015: 61-62 - 2014
- [j16]Trong-Yen Lee, Chi-Han Huang:
Design of Smart Power-Saving Architecture for Network on Chip. VLSI Design 2014: 531653:1-531653:10 (2014) - [c31]Trong-Yen Lee, Chi-Han Huang, Bo-Hao Wang, Cheng-Hsiu Kang, Jen-Yao Chen, I-Hsin Chou:
Energy-saving LED control module for agent-based Micro-Grid systems. ICCE-TW 2014: 127-128 - [c30]Trong-Yen Lee, Wei-Cheng Chen, Chi-Han Huang:
Design of Low-Complexity 4-Path Dynamic Reconfigurable MDC FFT Processor. ICS 2014: 257-268 - 2013
- [c29]Trong-Yen Lee, Nian-You Lin, Wei-Cheng Chen, Haixia Wu:
An Efficient Task Placement Method for Reconfigurable FPGA Systems. CISIS 2013: 451-455 - [c28]Trong-Yen Lee, Min-Jea Liu, Chia-Chen Fan, Chia-Chun Tsai, Haixia Wu:
Low Complexity Digit-Serial Multiplier over GF(2^m) Using Karatsuba Technology. CISIS 2013: 461-466 - 2012
- [j15]Chia-Chun Tsai, Chung-Chieh Kuo, Feng-Tzu Hsu, Trong-Yen Lee:
Discharge-path-based antenna effect detection and fixing for X-architecture clock tree. Integr. 45(1): 76-90 (2012) - [c27]Chia-Chun Tsai, Tsung-Ming Liu, Trong-Yen Lee:
Micro fuel cell power management circuit design for portable devices. FSKD 2012: 2493-2496 - [c26]Wen-Chieh Chen, Shih-Chia Huang, Trong-Yen Lee:
An Efficient Reconfigurable Architecture Design and Implementation of Image Contrast Enhancement Algorithm. HPCC-ICESS 2012: 1741-1747 - [c25]Trong-Yen Lee, Chi-Feng Lee:
Microcontroller based automatic parking system. ICMLC 2012: 875-879 - 2011
- [j14]Chia-Chun Tsai, Chung-Chieh Kuo, Trong-Yen Lee:
Post-Routing Double-Via Insertion for X-Architecture Clock Tree Yield Improvement. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(2): 706-716 (2011) - [j13]Chung-Chieh Kuo, Chia-Chun Tsai, Trong-Yen Lee:
Pattern-matching-based X-architecture zero-skew clock tree construction with X-Flip technique and via delay consideration. Integr. 44(1): 87-101 (2011) - [j12]Chia-Chun Tsai, Sheng-Bin Dai, Trong-Yen Lee:
The RF Circuit Design of Power and Data Contactless Transmission for ISO/IEC 14443-2 Type B. J. Circuits Syst. Comput. 20(8): 1637-1658 (2011) - 2010
- [j11]Trong-Yen Lee, Che-Cheng Hu, Li-Wen Lai, Chia-Chun Tsai:
Hardware Context-Switch Methodology for Dynamically Partially Reconfigurable Systems. J. Inf. Sci. Eng. 26(4): 1289-1305 (2010) - [c24]Chia-Chun Tsai, Chung-Chieh Kuo, Lin-Jeng Gu, Trong-Yen Lee:
Double-via insertion enhanced X-architecture clock routing for reliability. ISCAS 2010: 3413-3416 - [c23]Chia-Chun Tsai, Chung-Chieh Kuo, Lin-Jeng Gu, Trong-Yen Lee:
Antenna Violation Avoidance/Fixing for X-clock routing. ISQED 2010: 508-514
2000 – 2009
- 2009
- [j10]Chia-Chun Tsai, Jan-Ou Wu, Trong-Yen Lee:
Maximal Delay Reduction for RLC-Based Multi-Source Multi-Sink Bus with Repeater Insertion. Circuits Syst. Signal Process. 28(6): 805-817 (2009) - [j9]Chia-Chun Tsai, Kai-Wei Hong, Trong-Yen Lee:
A Bisection-Based Power Reduction Design for CMOS Flash Analog-to-Digital converters. J. Circuits Syst. Comput. 18(5): 933-945 (2009) - [j8]Chia-Chun Tsai, Chin-Yen Lin, Yuh-Shyan Hwang, Trong-Yen Lee:
The Design of a Li-ion Battery Charger Based on Multimode LDO Technology. J. Circuits Syst. Comput. 18(5): 947-963 (2009) - 2008
- [j7]Chia-Chun Tsai, Jan-Ou Wu, Trong-Yen Lee:
GDME: Grey Relational Clustering Applied to a Clock Tree Construction with Zero Skew and Minimal Delay. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(1): 365-374 (2008) - [c22]Chia-Chun Tsai, Wei-Shi Lin, Jan-Ou Wu, Chung-Chieh Kuo, Trong-Yen Lee:
Layer assignment considering manufacturability in X-architecture clock tree. CIT 2008: 880-885 - [c21]Chia-Chun Tsai, Chung-Chieh Kuo, Jan-Ou Wu, Trong-Yen Lee, Rong-Shue Hsiao:
X-clock routing based on pattern matching. SoCC 2008: 357-360 - 2007
- [j6]Jan-Ou Wu, Chia-Chun Tsai, Chung-Chieh Kuo, Trong-Yen Lee:
Zero-Skew Driven Buffered RLC Clock Tree Construction. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(3): 651-658 (2007) - [c20]Trong-Yen Lee, Yang-Hsin Fan, Yu-Min Cheng, Chia-Chun Tsai, Rong-Shue Hsiao:
Enhancement of Hardware-Software Partition for Embedded Multiprocessor FPGA Systems. IIH-MSP 2007: 19-22 - [c19]Trong-Yen Lee, Yang-Hsin Fan, Yu-Min Cheng, Chia-Chun Tsai, Rong-Shue Hsiao:
An Efficiently Hardware-Software Partitioning for Embedded Multiprocessor FPGA Systems. IMECS 2007: 346-351 - 2006
- [j5]Chia-Chun Tsai, Hann-Cheng Huang, Trong-Yen Lee, Wen-Ta Lee, Jan-Ou Wu:
Using Stack Reconstruction on RTL Orthogonal Scan Chain Design. J. Inf. Sci. Eng. 22(6): 1585-1599 (2006) - [c18]Chia-Chun Tsai, Jan-Ou Wu, Yu-Ting Shieh, Chung-Chieh Kuo, Trong-Yen Lee:
Tapping Point Numerical-Based Search for Exact Zero-Skew RLC Clock Tree Construction. APCCAS 2006: 812-815 - [c17]Chia-Chun Tsai, Jan-Ou Wu, Trong-Yen Lee, Rong-Shue Hsiao:
Propagation Delay Minimization on RLC-Based Bus with Repeater Insertion. APCCAS 2006: 1285-1288 - [c16]Trong-Yen Lee, Yang-Hsin Fan, Chia-Chun Tsai:
Reduction of RLC Tree Delay Using Bidirectional Buffer Repeater Insertion. ICICIC (2) 2006: 515-518 - [c15]Chia-Chun Tsai, Huang-Chi Chou, Trong-Yen Lee, Rong-Shue Hsiao:
A single chip image sensor embedded smooth spatial filter with A/D conversion. ISCAS 2006 - [c14]Chia-Chun Tsai, Jan-Ou Wu, Chien-Wen Kao, Trong-Yen Lee, Rong-Shue Hsiao:
Coupling aware RLC-based clock routings for crosstalk minimization. ISCAS 2006 - 2005
- [j4]Pao-Ann Hsiung, Trong-Yen Lee, Jih-Ming Fu, Win-Bin See:
SESAG: an object-oriented application framework for real-time systems. Softw. Pract. Exp. 35(10): 899-921 (2005) - [c13]Chia-Chun Tsai, Jan-Ou Wu, Chung-Chieh Kuo, Trong-Yen Lee, Wen-Ta Lee:
Zero-Skew Driven for RLC Clock Tree Construction in SoC. ICITA (1) 2005: 561-566 - [c12]Wen-Ta Lee, San-Ho Lin, Chia-Chun Tsai, Trong-Yen Lee, Yuh-Shyan Hwang:
A new low-power turbo decoder using HDA-DHDD stopping iteration. ISCAS (2) 2005: 1040-1043 - [c11]Yuh-Shyan Hwang, Lu-Po Liao, Chia-Chun Tsai, Wen-Ta Lee, Trong-Yen Lee, Jiann-Jong Chen:
A new CCII-based pipelined analog to digital converter. ISCAS (6) 2005: 6170-6173 - 2004
- [j3]Trong-Yen Lee, Pao-Ann Hsiung:
Embedded software synthesis and prototyping. IEEE Trans. Consumer Electron. 50(1): 386-392 (2004) - [j2]Pao-Ann Hsiung, Shang-Wei Lin, Chih-Hao Tseng, Trong-Yen Lee, Jih-Ming Fu, Win-Bin See:
VERTAF: An Application Framework for the Design and Verification of Embedded Real-Time Software. IEEE Trans. Software Eng. 30(10): 656-674 (2004) - [c10]Trong-Yen Lee, Yang-Hsin Fan, Tsung-Hsun Yang, Chia-Chun Tsai, Wen-Ta Lee, Yuh-Shyan Hwang:
RCGES: Retargetable Code Generation for Embedded Systems. ATVA 2004: 415-425 - 2003
- [c9]Pao-Ann Hsiung, Cheng-Yi Lin, Trong-Yen Lee:
Quasi-Dynamic Scheduling for the Synthesis of Real-Time Embedded Software with Local and Global Deadlines. RTCSA 2003: 229-243 - [c8]Trong-Yen Lee, Pao-Ann Hsiung, I-Mu Wu, Feng-Shi Su:
RESS: Real-Time Embedded Software Synthesis and Prototyping Methodology. RTCSA 2003: 529-544 - [c7]Win-Bin See, Pao-Ann Hsiung, Trong-Yen Lee, Sao-Jie Chen:
Software Platform for Embedded Software Development. RTCSA 2003: 545-557 - 2002
- [c6]Pao-Ann Hsiung, Trong-Yen Lee, Feng-Shi Su:
Formal Synthesis and Code Generation of Real-Time Embedded Software using Time-Extended Quasi-Static Scheduling. APSEC 2002: 395-404 - [c5]Trong-Yen Lee, Pao-Ann Hsiung, Sao-Jie Chen:
TCN: Scalable Hierarchical Hypercubes. ICPADS 2002: 11-16 - [c4]Pao-Ann Hsiung, Trong-Yen Lee, Win-Bin See, Jih-Ming Fu, Sao-Jie Chen:
VERTAF: An Object-Oriented Application Framework for Embedded Real-Time Systems. Symposium on Object-Oriented Real-Time Distributed Computing 2002: 322-329 - 2001
- [c3]Pao-Ann Hsiung, Win-Bin See, Trong-Yen Lee, Jih-Ming Fu, Sao-Jie Chen:
Formal Verification of Embedded Real-Time Software in Component-Based Application Frameworks. APSEC 2001: 71-78
1990 – 1999
- 1999
- [c2]Trong-Yen Lee, Pao-Ann Hsiung, Sao-Jie Chen:
A Case Study in Hardware-Software Codesign of Distributed Systems - Vehicle Parking Management System. PDPTA 1999: 2982-2987 - 1998
- [j1]Pao-Ann Hsiung, Chung-Hwang Chen, Trong-Yen Lee, Sao-Jie Chen:
ICOS: an intelligent concurrent object-oriented synthesis methodology for multiprocessor systems. ACM Trans. Design Autom. Electr. Syst. 3(2): 109-135 (1998) - 1997
- [c1]Pao-Ann Hsiung, Trong-Yen Lee, Sao-Jie Chen:
Object-Oriented Technology Transfer to Multiprocessor System-Level Synthesis. TOOLS (24) 1997: 284-293
Coauthor Index
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