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Peter Nilsson 0001
Person information
- affiliation: Lund University, Sweden
Other persons with the same name
- Peter Nilsson — disambiguation page
- Peter Nilsson 0002 — Volvo Group Trucks Technology, Gothenburg, Sweden
- Peter Nilsson 0003 — KTH Stockholm, Sweden
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2010 – 2019
- 2018
- [j18]Erik Hertz, Jingou Lai, Bertil Svensson, Peter Nilsson:
The Harmonized Parabolic Synthesis Methodology for Hardware Efficient Function Generation with Full Error Control. J. Signal Process. Syst. 90(12): 1623-1637 (2018) - 2016
- [j17]Erik Hertz, Bertil Svensson, Peter Nilsson:
Combining the parabolic synthesis methodology with second-degree interpolation. Microprocess. Microsystems 42: 142-155 (2016) - [j16]Rakesh Gangarajaiah, Mohammed Abdulaziz, Henrik Sjöland, Peter Nilsson, Liang Liu:
A Digitally Assisted Nonlinearity Mitigation System for Tunable Channel Select Filters. IEEE Trans. Circuits Syst. II Express Briefs 63-II(1): 69-73 (2016) - 2015
- [c49]Victor V. Zyuban, Peter Nilsson:
Session 8 overview: Low-power digital techniques: Energy-efficient digital. ISSCC 2015: 142-143 - [c48]Peter Nilsson, Yuhang Sun, Rakesh Gangarajaiah, Erik Hertz:
Low power unrolled CORDIC architectures. NORCAS 2015: 1-4 - 2014
- [j15]Johan Löfgren, Liang Liu, Ove Edfors, Peter Nilsson:
Improved Matching-Pursuit Implementation for LTE Channel Estimation. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(1): 226-237 (2014) - [c47]Peter Nilsson, Pietro Andreani, Krzysztof Kuchcinski, Joachim Rodrigues, Henrik Sjöland, Markus Törmänen, Lars-Erik Wernersson, Viktor Öwall:
Lessons from ten years of the international master's program in System-on-Chip. EWME 2014: 187-192 - [c46]S. M. Yasser Sherazi, Henrik Sjöland, Peter Nilsson:
A digital baseband for low power FSK based receiver in 65 nm CMOS. ICECS 2014: 159-162 - [c45]Peter Nilsson, Mohammed Azher Ali, Manivannan Ethiraj, S. M. Yasser Sherazi:
Supply-voltage down conversion for digital CMOS designs. ICECS 2014: 339-342 - [c44]Henrik Sjöland, John B. Anderson, Carl Bryant, Rohit Chandra, Ove Edfors, Anders J. Johansson, Nafiseh Seyed Mazloum, Reza Meraji, Peter Nilsson, Dejan Radjen, Joachim Neves Rodrigues, S. M. Yasser Sherazi, Viktor Öwall:
Ultra low power transceivers for wireless sensors and body area networks. ISMICT 2014: 1-5 - [c43]Peter Nilsson, Ateeq Ur Rahman Shaik, Rakesh Gangarajaiah, Erik Hertz:
Hardware implementation of the exponential function using Taylor series. NORCHIP 2014: 1-4 - [c42]Rakesh Gangarajaiah, Peter Nilsson, Ove Edfors, Liang Liu:
Low complexity adaptive channel estimation and QR decomposition for an LTE-A downlink. PIMRC 2014: 459-463 - 2013
- [j14]S. M. Yasser Sherazi, Joachim Neves Rodrigues, Omer Can Akgun, Henrik Sjöland, Peter Nilsson:
Ultra low energy design exploration of digital decimation filters in 65 nm dual-VT CMOS in the sub-VT domain. Microprocess. Microsystems 37(4-5): 494-504 (2013) - [j13]Liang Liu, Johan Löfgren, Peter Nilsson, Viktor Öwall:
VLSI Implementation of a Soft-Output Signal Detector for Multimode Adaptive Multiple-Input Multiple-Output Systems. IEEE Trans. Very Large Scale Integr. Syst. 21(12): 2262-2273 (2013) - [c41]Rakesh Gangarajaiah, Liang Liu, Michal Stala, Peter Nilsson, Ove Edfors:
A high-speed QR decomposition processor for carrier-aggregated LTE-A downlink systems. ECCTD 2013: 1-4 - [c40]Peter Nilsson, Anusha Gundarapu, S. M. Yasser Sherazi:
Power savings in digital filters for wireless communication. ECCTD 2013: 1-4 - 2012
- [j12]Henrik Sjöland, John B. Anderson, Carl Bryant, Rohit Chandra, Ove Edfors, Anders J. Johansson, Nafiseh Seyed Mazloum, Reza Meraji, Peter Nilsson, Dejan Radjen, Joachim Neves Rodrigues, S. M. Yasser Sherazi, Viktor Öwall:
A Receiver Architecture for Devices in Wireless Body Area Networks. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(1): 82-95 (2012) - [j11]Liang Liu, Johan Löfgren, Peter Nilsson:
Area-Efficient Configurable High-Throughput Signal Detector Supporting Multiple MIMO Modes. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(9): 2085-2096 (2012) - [j10]Liang Liu, Johan Löfgren, Peter Nilsson:
Low-Complexity Likelihood Information Generation for Spatial-Multiplexing MIMO Signal Detection. IEEE Trans. Veh. Technol. 61(2): 607-617 (2012) - [c39]S. M. Yasser Sherazi, Peter Nilsson, Henrik Sjöland, Joachim Neves Rodrigues:
A 100-fJ/cycle sub-VT decimation filter chain in 65 nm CMOS. ICECS 2012: 448-451 - [c38]Liang Liu, Johan Löfgren, Peter Nilsson:
A unified multi-mode MIMO detector with soft-output. ISCAS 2012: 2853-2856 - 2011
- [c37]Peter Nilsson, Erik Hertz:
Ultra low power hardware for computing Squared Euclidean Distances. ECCTD 2011: 580-583 - [c36]Peter Nilsson, Syed Nadeemuddin:
Power reductions in unrolled CORDIC architectures. ECCTD 2011: 705-708 - [c35]Peyman Pouyan, Erik Hertz, Peter Nilsson:
A VLSI implementation of logarithmic and exponential functions using a novel parabolic synthesis methodology compared to the CORDIC algorithm. ECCTD 2011: 709-712 - [c34]Johan Löfgren, Ove Edfors, Peter Nilsson:
Improved matching pursuit algorithm and architecture for LTE Channel Estimation. ISCAS 2011: 466-469 - [c33]Liang Liu, Peter Nilsson:
Detecting multi-mode MIMO signals: Algorithm and architecture design. ISCAS 2011: 689-692 - [c32]S. M. Yasser Sherazi, Peter Nilsson, Omer Can Akgun, Henrik Sjöland, Joachim Neves Rodrigues:
Design exploration of a 65 nm Sub-VT CMOS digital decimation filter chain. ISCAS 2011: 837-840 - [c31]Johan Löfgren, Peter Nilsson:
On hardware implementation of radix 3 and radix 5 FFT kernels for LTE systems. NORCHIP 2011: 1-4 - [c30]Liang Liu, Johan Löfgren, Peter Nilsson:
Low complexity soft-output signal detector for spatial-multiplexing MIMO system. PIMRC 2011: 1718-1722 - 2010
- [c29]Peter Nilsson, Pierre Nugues:
Automatic Discovery of Feature Sets for Dependency Parsing. COLING 2010: 824-832
2000 – 2009
- 2009
- [j9]Peter Nilsson:
Architectures and Arithmetic for Low Static Power Consumption in Nanoscale CMOS. VLSI Design 2009: 749272:1-749272:10 (2009) - [c28]Peter Nilsson:
Complexity reductions in unrolled CORDIC architectures. ICECS 2009: 868-871 - [c27]Erik Hertz, Peter Nilsson:
Parabolic Synthesis Methodology Implemented on the Sine Function. ISCAS 2009: 253-256 - [c26]Johan Löfgren, Peter Nilsson, Ove Edfors:
Hardware Architecture of an SVD based MIMO OFDM Channel Estimator. ISCAS 2009: 709-712 - 2008
- [j8]Fredrik Kristensen, Hugo Hedberg, Hongtu Jiang, Peter Nilsson, Viktor Öwall:
An Embedded Real-Time Surveillance System: Implementation and Evaluation. J. Signal Process. Syst. 52(1): 75-94 (2008) - [c25]Peter Nilsson:
Arithmetic reduction of adder leakage in nanoscale CMOS. APCCAS 2008: 717-720 - 2007
- [c24]Barbara Cerato, Guido Masera, Peter Nilsson:
Hardware architecture for matrix factorization in mimo receivers. ACM Great Lakes Symposium on VLSI 2007: 196-199 - [c23]Peter Nilsson:
Reducing Leakage Power in Fixed Coefficient Arithmetic. ICECS 2007: 306-309 - 2006
- [j7]Zhan Guo, Peter Nilsson:
Algorithm and implementation of the K-best sphere decoding for MIMO detection. IEEE J. Sel. Areas Commun. 24(3): 491-503 (2006) - [j6]Zhan Guo, Peter Nilsson:
A VLSI Architecture of the Square Root Algorithm for V-BLAST Detection. J. VLSI Signal Process. 44(3): 219-230 (2006) - [c22]Fredrik Kristensen, Peter Nilsson, Viktor Öwall:
Background Segmentation Beyond RGB. ACCV (2) 2006: 602-612 - [c21]Peter Nilsson:
Arithmetic Reduction of the Static Power Consumption in Nanoscale CMOS. ICECS 2006: 656-659 - 2005
- [c20]Hugo Hedberg, Fredrik Kristensen, Peter Nilsson, Viktor Öwall:
A low complexity architecture for binary image erosion and dilation using structuring element decomposition. ISCAS (4) 2005: 3431-3434 - [c19]Zhan Guo, Peter Nilsson:
A 53.3 Mb/s 4×4 16-QAM MIMO decoder in 0.35-µm CMOS. ISCAS (5) 2005: 4947-4950 - 2004
- [j5]Zhan Guo, Peter Nilsson:
Reduced complexity Schnorr-Euchner decoding algorithms for MIMO systems. IEEE Commun. Lett. 8(5): 286-288 (2004) - [j4]Thomas Olsson, Peter Nilsson:
A digitally controlled PLL for SoC applications. IEEE J. Solid State Circuits 39(5): 751-760 (2004) - [c18]Zhan Guo, Peter Nilsson:
VLSI implementation issues of lattice decoders for MIMO systems. ISCAS (4) 2004: 477-480 - 2003
- [c17]Thomas Olsson, Peter Nilsson:
A digitally controlled PLL for digital SOCs. ISCAS (5) 2003: 437-440 - [c16]Hugo Hedberg, Thomas Lenart, Henrik Svensson, Peter Nilsson, Viktor Öwall:
Teaching Digital HW-Design by Implementing a Complete MP3 Decoder. MSE 2003: 31-32 - [c15]Fredrik Kristensen, Peter Nilsson, Anders Olsson:
A generic transmitter for wireless OFDM systems. PIMRC 2003: 2234-2238 - [c14]Zhan Guo, Peter Nilsson:
A VLSI implementation of MIMO detection for future wireless communications. PIMRC 2003: 2852-2856 - 2001
- [c13]Thomas Olsson, Pontus Åström, Peter Nilsson:
Dual supply-voltage scaling for reconfigurable SoC's. ISCAS (3) 2001: 61-64 - [c12]Pontus Åström, Stefan Johansson, Peter Nilsson:
Application of Software design patterns to DSP library design. ISSS 2001: 239-243 - [c11]Peter Nilsson, Petru Eles, Hannu Tenhunen:
SOCWARE: A New Swedish Design Cluster for System-on-Chip. MSE 2001: 44-45 - 2000
- [c10]Stefan Johansson, Martin Nilsson, Peter Nilsson:
An OFDM timing synchronization ASIC. ICECS 2000: 324-327 - [c9]Thomas Olsson, Peter Nilsson, Thomas Meincke, Ahmad Hemami, Mats Torkelson:
A digitally controlled low-power clock multiplier for globally asynchronous locally synchronous designs. ISCAS 2000: 13-16
1990 – 1999
- 1999
- [c8]Ahmed Hemani, Thomas Meincke, Shashi Kumar, Adam Postula, Thomas Olsson, Peter Nilsson, Johnny Öberg, Peeter Ellervee, Dan Lundqvist:
Lowering Power Consumption in Clock by Using Globally Asynchronous Locally Synchronous Design Style. DAC 1999: 873-878 - [c7]Stefan Johansson, Daniel Landström, Peter Nilsson:
Silicon realization of an OFDM synchronization algorithm. ICECS 1999: 319-322 - [c6]Thomas Meincke, Ahmed Hemani, Shashi Kumar, Peeter Ellervee, Johnny Öberg, Thomas Olsson, Peter Nilsson, Dan Lindqvist, Hannu Tenhunen:
Globally asynchronous locally synchronous architecture for large high-performance ASICs. ISCAS (2) 1999: 512-515 - 1998
- [j3]Scott A. Leyonhjelm, Michael Faulkner, Peter Nilsson:
An Efficient Implementation OF Bandlimited Dithering. Wirel. Pers. Commun. 8(1): 31-36 (1998) - [c5]Thomas Olsson, Carl Magnus Jönsson, Viktor Öwall, Peter Nilsson:
Hardware implementation aspects of a detector based on successive interference cancellation in a DS/CDMA system. PIMRC 1998: 391-395 - 1997
- [j2]Peter Nilsson, Mats Torkelson:
A custom digital intermediate frequency filter for the American mobile telephone system. IEEE J. Solid State Circuits 32(6): 806-815 (1997) - 1996
- [j1]Peter Nilsson, Mats Torkelson:
A monolithic digital clock-generator for on-chip clocking of custom DSP's. IEEE J. Solid State Circuits 31(5): 700-706 (1996) - [c4]Pontus Åström, Peter Nilsson, Mats Torkelson:
Design of a fast and area efficient filter. EUSIPCO 1996: 1-4 - 1994
- [c3]Peter Nilsson, Mats Torkelson, Kent Palmkvist, Mark Vesterbacka, Lars Wanhammar:
A Bit-Serial CMOS Digital IF-Filter for Mobile Radio Using an On-Chip Clock. Mobile Communications 1994: 510-521 - 1993
- [c2]Bengt E. W. Andersson, Peter Nilsson:
How to Manage Complexity in Inter-Organizational Information Systems (IOIS) - Some Preliminary Conclusions. Decision Support in Public Administration 1993: 17-28 - [c1]Viktor Öwall, Pietro Andreani, L. Brange, Peter Nilsson, A. Wass, Mats Torkelson:
A GSM speech coder implemented on a customized processor architecture. ISCAS 1993: 235-238
Coauthor Index
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