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ORCIDMLCAD 2022: Virtual Event China
- 2022 ACM/IEEE Workshop on Machine Learning for CAD, MLCAD 2022, Virtual Event, China, September 12-13, 2022. ACM / IEEE 2022, ISBN 978-1-4503-9486-4
Abstract
- Yi-Chen Lu, Tian Yang, Sung Kyu Lim, Haoxing Ren:
Placement Optimization via PPA-Directed Graph Clustering. 1-6 - Vidya A. Chhabria
, Wenjing Jiang, Andrew B. Kahng, Sachin S. Sapatnekar:
From Global Route to Detailed Route: ML for Fast and Accurate Wire Parasitics and Timing Prediction. 7-14 - Umair F. Siddiqi, Timothy Martin, Sam Van Den Eijnden, Ahmed Shamli, Gary Gréwal, Sadiq M. Sait, Shawki Areibi:
Faster FPGA Routing by Forecasting and Pre-Loading Congestion Information. 15-20 - Yannick Uhlmann, Michael Essich, Lennart Bramlage, Jürgen Scheible, Cristóbal Curio:
Deep Reinforcement Learning for Analog Circuit Sizing with an Electrical Design Space and Sparse Rewards. 21-26 - Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
LinEasyBO: Scalable Bayesian Optimization Approach for Analog Circuit Synthesis via One-Dimensional Subspaces. 27-34 - Wei Shi, Hanrui Wang, Jiaqi Gu, Mingjie Liu, David Z. Pan, Song Han, Nan Sun:
RobustAnalog: Fast Variation-Aware Analog Circuit Design Via Multi-task RL. 35-41 - Hung-Yun Hsu, Mark Po-Hung Lin:
Automatic Analog Schematic Diagram Generation based on Building Block Classification and Reinforcement Learning. 43-48 - Somdeb Majumdar:
The Changing Landscape of AI-driven System Optimization for Complex Combinatorial Optimization. 49 - Thomas Andersen:
AI Chips Built by AI - Promise or Reality?: An Industry Perspective. 51 - Borivoje Nikolic:
ML for Analog Design: Good Progress, but More to Do. 53-54 - Bing-Yue Wu, Shao-Yun Fang, Hsiang-Wen Chang, Peter Wei:
SpeedER: A Supervised Encoder-Decoder Driven Engine for Effective Resistance Estimation of Power Delivery Networks. 55-61 - Vidya A. Chhabria, Ben Keller, Yanqing Zhang, Sandeep Vollala, Sreedhar Pratty, Haoxing Ren, Brucek Khailany:
XT-PRAGGMA: Crosstalk Pessimism Reduction Achieved with GPU Gate-level Simulations and Machine Learning. 63-69 - Yonghwi Kwon, Youngsoo Shin:
Fast Prediction of Dynamic IR-Drop Using Recurrent U-Net Architecture. 71-76 - Binwu Zhu, Xinyun Zhang, Yibo Lin, Bei Yu, Martin D. F. Wong:
Efficient Design Rule Checking Script Generation via Key Information Extraction. 77-82 - Naiju Karim Abdul, George Antony, Rahul M. Rao, Suriya T. Skariah:
Scan Chain Clustering and Optimization with Constrained Clustering and Reinforcement Learning. 83-90 - Mohamed Tarek Ismail, Hossam Sharara, Kareem Madkour, Karim G. Seddik:
Autoencoder-Based Data Sampling for Machine Learning-Based Lithography Hotspot Detection. 91-96 - Yi-Chen Lu, Wei-Ting Chan, Vishal Khandelwal, Sung Kyu Lim:
Driving Early Physical Synthesis Exploration through End-of-Flow Total Power Prediction. 97-102 - Christopher A. Metz, Mehran Goli, Rolf Drechsler:
Towards Neural Hardware Search: Power Estimation of CNNs for GPGPUs with Dynamic Frequency Scaling. 103-109 - Rishikesh Ranade, Haiyang He, Jay Pathak, Norman Chang, Akhilesh Kumar, Jimin Wen:
A Thermal Machine Learning Solver For Chip Simulation. 111-117 - Hadi Esmaeilzadeh, Soroush Ghodrati, Andrew B. Kahng, Joon Kyung Kim, Sean Kinzer, Sayak Kundu, Rohan Mahapatra, Susmita Dey Manasi, Sachin S. Sapatnekar, Zhiang Wang, Ziqing Zeng:
Physically Accurate Learning-based Performance Prediction of Hardware-accelerated ML Algorithms. 119-126 - Pratik Shrestha, Saran Phatharodom, Ioannis Savidis:
Graph Representation Learning for Gate Arrival Time Prediction. 127-133 - Zixuan Jiang, Mingjie Liu, Zizheng Guo, Shuhan Zhang, Yibo Lin, David Z. Pan:
A Tale of EDA's Long Tail: Long-Tailed Distribution Learning for Electronic Design Automation. 135-141 - Christian Lück, Daniela Sanchez Lopera, Sven Wenzek, Wolfgang Ecker:
Industrial Experience with Open-Source EDA Tools. 143 - Oluwaseyi Akinwande, Osama Waqar Bhatti, Xingchen Li, Madhavan Swaminathan:
Invertible Neural Networks for Design of Broadband Active Mixers. 145-151 - Yuejiang Wen, Jacob Dean, Brian A. Floyd, Paul D. Franzon:
High Dimensional Optimization for Electronic Design. 153-157 - Zhengfeng Wu, Ioannis Savidis:
Transfer of Performance Models Across Analog Circuit Topologies with Graph Neural Networks. 159-165 - Priyank Kashyap, Archit Gajjar, Yongjin Choi, Chau-Wai Wong, Dror Baron, Tianfu Wu, Chris Cheng, Paul D. Franzon:
RxGAN: Modeling High-Speed Receiver through Generative Adversarial Networks. 167-172
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