
Sung Kyu Lim
Person information
- affiliation: Georgia Institute of Technology, Atlanta GA, USA
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2020 – today
- 2020
- [j80]Lingjun Zhu
, Lennart Bamberg
, Anthony Agnesina
, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Julien Ryckaert, Alberto García-Ortiz
, Sung Kyu Lim:
Heterogeneous 3D Integration for a RISC-V System With STT-MRAM. IEEE Comput. Archit. Lett. 19(1): 51-54 (2020) - [j79]Arjun Chaudhuri
, Sanmitra Banerjee
, Heechun Park, Jinwoo Kim
, Gauthaman Murali
, Edward Lee
, Daehyun Kim
, Sung Kyu Lim, Saibal Mukhopadhyay, Krishnendu Chakrabarty
:
Advances in Design and Test of Monolithic 3-D ICs. IEEE Des. Test 37(4): 92-100 (2020) - [j78]Bon Woong Ku
, Kyungwook Chang
, Sung Kyu Lim:
Compact-2D: A Physical Design Methodology to Build Two-Tier Gate-Level 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(6): 1151-1164 (2020) - [j77]Anthony Agnesina, Sung Kyu Lim, Etienne Lepercq, Jose Escobedo Del Cid:
Improving FPGA-Based Logic Emulation Systems through Machine Learning. ACM Trans. Design Autom. Electr. Syst. 25(5): 46:1-46:20 (2020) - [j76]Anthony Agnesina
, James Yamaguchi, Christian Krutzik, John Carson, Jean Yang-Scharlotta
, Sung Kyu Lim:
A COTS-Based Novel 3-D DRAM Memory Cube Architecture for Space Applications. IEEE Trans. Very Large Scale Integr. Syst. 28(9): 2055-2068 (2020) - [j75]Jinwoo Kim
, Gauthaman Murali
, Heechun Park
, Eric Qin, Hyoukjun Kwon
, Venkata Chaitanya Krishna Chekuri
, Nael Mizanur Rahman, Nihar Dasari, Arvind Singh, Minah Lee
, Hakki Mert Torun
, Kallol Roy
, Madhavan Swaminathan, Saibal Mukhopadhyay, Tushar Krishna, Sung Kyu Lim:
Architecture, Chip, and Package Codesign Flow for Interposer-Based 2.5-D Chiplet Integration Enabling Heterogeneous IP Reuse. IEEE Trans. Very Large Scale Integr. Syst. 28(11): 2424-2437 (2020) - [c164]Shao-Chun Hung, Yi-Chen Lu, Sung Kyu Lim, Krishnendu Chakrabarty:
Power Supply Noise-Aware Scan Test Pattern Reshaping for At-Speed Delay Fault Testing of Monolithic 3D ICs *. ATS 2020: 1-6 - [c163]Yi-Chen Lu, Sai Surya Kiran Pentapati, Lingjun Zhu, Kambiz Samadi, Sung Kyu Lim:
TP-GNN: A Graph Neural Network Framework for Tier Partitioning in Monolithic 3D ICs. DAC 2020: 1-6 - [c162]Lennart Bamberg
, Alberto García Ortiz, Lingjun Zhu, Sai Pentapati, Da Eun Shim, Sung Kyu Lim:
Macro-3D: A Physical Design Methodology for Face-to-Face-Stacked Heterogeneous 3D ICs. DATE 2020: 37-42 - [c161]Sai Surya Kiran Pentapati, Kyungwook Chang, Vassilios Gerousis, Rwik Sengupta, Sung Kyu Lim:
Pin-3D: A Physical Synthesis and Post-Layout Optimization Flow for Heterogeneous Monolithic 3D ICs. ICCAD 2020: 4:1-4:9 - [c160]Jinwoo Kim, Gauthaman Murali, Pruek Vanna-Iampikul, Edward Lee, Daehyun Kim, Arjun Chaudhuri, Sanmitra Banerjee, Krishnendu Chakrabarty, Saibal Mukhopadhyay, Sung Kyu Lim:
RTL-to-GDS Design Tools for Monolithic 3D ICs. ICCAD 2020: 126:1-126:8 - [c159]Anthony Agnesina, Kyungwook Chang, Sung Kyu Lim:
VLSI Placement Parameter Optimization using Deep Reinforcement Learning. ICCAD 2020: 144:1-144:9 - [c158]Yi-Chen Lu, Siddhartha Nath, Sai Surya Kiran Pentapati, Sung Kyu Lim:
A Fast Learning-Driven Signoff Power Optimization Framework. ICCAD 2020: 161:1-161:9 - [c157]Jinwoo Kim, Venkata Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Majid Ahadi Dolatsara, Hakki Mert Torun, Madhavan Swaminathan, Saibal Mukhopadhyay, Sung Kyu Lim:
Silicon vs. Organic Interposer: PPA and Reliability Tradeoffs in Heterogeneous 2.5D Chiplet Integration. ICCD 2020: 80-87 - [c156]Anthony Agnesina, Da Eun Shim, James Yamaguchi, Christian Krutzik, John Carson, Dan Nakamura, Sung Kyu Lim:
A Fault-Tolerant and High-Speed Memory Controller Targeting 3D Flash Memory Cubes for Space Applications. ICCD 2020: 425-432 - [c155]Bon Woong Ku, Sung Kyu Lim:
Pin-in-the-middle: an efficient block pin assignment methodology for block-level monolithic 3D ICs. ISLPED 2020: 85-90 - [c154]Lingjun Zhu
, Kyungwook Chang, Dusan Petranovic, Saurabh Sinha, Yun Seop Yu, Sung Kyu Lim:
Full-Chip Electro-Thermal Coupling Extraction and Analysis for Face-to-Face Bonded 3D ICs. ISPD 2020: 39-46 - [c153]Heechun Park, Bon Woong Ku, Kyungwook Chang, Da Eun Shim, Sung Kyu Lim:
Pseudo-3D Approaches for Commercial-Grade RTL-to-GDS Tool Flow Targeting Monolithic 3D ICs. ISPD 2020: 47-54 - [i2]Fares Elsabbagh, Blaise Tine, Priyadarshini Roshan, Ethan Lyons, Euna Kim, Da Eun Shim, Lingjun Zhu, Sung Kyu Lim, Hyesoon Kim:
Vortex: OpenCL Compatible RISC-V GPGPU. CoRR abs/2002.12151 (2020) - [i1]Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna, Sung Kyu Lim, Arijit Raychowdhury:
Breaking Barriers: Maximizing Array Utilization for Compute In-Memory Fabrics. CoRR abs/2008.06741 (2020)
2010 – 2019
- 2019
- [j74]Sai Pentapati, Lingjun Zhu
, Lennart Bamberg
, Da Eun Shim, Alberto García Ortiz
, Sung Kyu Lim:
A Logic-on-Memory Processor-System Design With Monolithic 3-D Technology. IEEE Micro 39(6): 38-45 (2019) - [j73]Tianchen Wang
, Sandeep Kumar Samal
, Sung Kyu Lim, Yiyu Shi:
Entropy Production-Based Full-Chip Fatigue Analysis: From Theory to Mobile Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(1): 84-95 (2019) - [j72]Kyungwook Chang
, Shidhartha Das, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim:
System-Level Power Delivery Network Analysis and Optimization for Monolithic 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 27(4): 888-898 (2019) - [c152]Heechun Park, Kyungwook Chang, Bon Woong Ku, Jinwoo Kim, Edward Lee, Daehyun Kim, Arjun Chaudhuri, Sanmitra Banerjee, Saibal Mukhopadhyay, Krishnendu Chakrabarty, Sung Kyu Lim:
RTL-to-GDS Tool Flow and Design-for-Test Solutions for Monolithic 3D ICs. DAC 2019: 101 - [c151]Jinwoo Kim, Gauthaman Murali
, Heechun Park, Eric Qin, Hyoukjun Kwon, Venkata Chaitanya Krishna Chekuri
, Nihar Dasari, Arvind Singh, Minah Lee, Hakki Mert Torun, Kallol Roy, Madhavan Swaminathan, Saibal Mukhopadhyay, Tushar Krishna, Sung Kyu Lim:
Architecture, Chip, and Package Co-design Flow for 2.5D IC Design Enabling Heterogeneous IP Reuse. DAC 2019: 178 - [c150]Arjun Chaudhuri, Sanmitra Banerjee, Heechun Park, Bon Woong Ku, Krishnendu Chakrabarty, Sung Kyu Lim:
Built-in Self-Test for Inter-Layer Vias in Monolithic 3D ICs. ETS 2019: 1-6 - [c149]Sai Surya Kiran Pentapati, Da Eun Shim, Sung Kyu Lim:
Logic Monolithic 3D ICs: PPA Benefits and EDA Tools Necessary. ACM Great Lakes Symposium on VLSI 2019: 445-450 - [c148]Anthony Agnesina, Etienne Lepercq, Jose Escobedo, Sung Kyu Lim:
Reducing Compilation Effort in Commercial FPGA Emulation Systems Using Machine Learning. ICCAD 2019: 1-8 - [c147]Yi-Chen Lu, Jeehyun Lee, Anthony Agnesina, Kambiz Samadi, Sung Kyu Lim:
GAN-CTS: A Generative Adversarial Framework for Clock Tree Prediction and Optimization. ICCAD 2019: 1-8 - [c146]Hakki Mert Torun, Huan Yu, Nihar Dasari, Venkata Chaitanya Krishna Chekuri
, Arvind Singh, Jinwoo Kim, Sung Kyu Lim, Saibal Mukhopadhyay, Madhavan Swaminathan:
A Spectral Convolutional Net for Co-Optimization of Integrated Voltage Regulators and Embedded Inductors. ICCAD 2019: 1-8 - [c145]Da Eun Shim, Sai Pentapati, Jeehyun Lee, Yun Seop Yu, Sung Kyu Lim:
Tier Partitioning and Flip-flop Relocation Methods for Clock Trees in Monolithic 3D ICs. ISLPED 2019: 1-6 - 2018
- [j71]Kyungwook Chang, Deepak Kadetotad, Yu Cao, Jae-sun Seo, Sung Kyu Lim:
Power, Performance, and Area Benefit of Monolithic 3D ICs for On-Chip Deep Neural Networks Targeting Speech Recognition. ACM J. Emerg. Technol. Comput. Syst. 14(4): 42:1-42:19 (2018) - [c144]Anthony Agnesina, Amanvir Sidana, James Yamaguchi, Christian Krutzik, John Carson, Jean Yang-Scharlotta, Sung Kyu Lim:
A novel 3D DRAM memory cube architecture for space applications. DAC 2018: 24:1-24:6 - [c143]Bon Woong Ku, Yu Liu, Yingyezhe Jin, Sandeep Kumar Samal, Peng Li, Sung Kyu Lim:
Design and architectural co-optimization of monolithic 3D liquid state machine-based neuromorphic processor. DAC 2018: 165:1-165:6 - [c142]Pu Pang, Yixun Zhang, Tianjian Li, Sung Kyu Lim, Quan Chen, Xiaoyao Liang, Li Jiang:
In-growth test for monolithic 3D integrated SRAM. DATE 2018: 569-572 - [c141]Bon Woong Ku, Yu Liu, Yingyezhe Jin, Peng Li, Sung Kyu Lim:
Area-efficient and low-power face-to-face-bonded 3D liquid state machine design. ICCAD 2018: 121 - [c140]Kyungwook Chang, Sai Pentapati, Da Eun Shim, Sung Kyu Lim:
Road to High-Performance 3D ICs: Performance Optimization Methodologies for Monolithic 3D ICs. ISLPED 2018: 33:1-33:6 - [c139]Bon Woong Ku, Kyungwook Chang, Sung Kyu Lim:
Compact-2D: A Physical Design Methodology to Build Commercial-Quality Face-to-Face-Bonded 3D ICs. ISPD 2018: 90-97 - [c138]Md Musabbir Adnan, Sagarvarma Sayyaparaju, Garrett S. Rose
, Catherine D. Schuman, Bon Woong Ku, Sung Kyu Lim:
A Twin Memristor Synapse for Spike Timing Dependent Learning in Neuromorphic Systems. SoCC 2018: 37-42 - 2017
- [j70]Sandeep Kumar Samal, Guoqing Chen, Sung Kyu Lim:
Improving Performance under Process and Voltage Variations in Near-Threshold Computing Using 3D ICs. ACM J. Emerg. Technol. Comput. Syst. 13(4): 59:1-59:18 (2017) - [j69]Sung Kyu Lim:
Bringing 3D ICs to Aerospace: Needs for Design Tools and Methodologies. J. Inform. and Commun. Convergence Engineering 15(2) (2017) - [j68]Seung-Ho Ok, Yong-Hwan Lee, Jae Hoon Shim, Sung Kyu Lim, Byungin Moon
:
The Impact of 3D Stacking and Technology Scaling on the Power and Area of Stereo Matching Processors. Sensors 17(2): 426 (2017) - [j67]Sandeep Kumar Samal
, Kambiz Samadi, Pratyush Kamal, Yang Du, Sung Kyu Lim:
Full Chip Impact Study of Power Delivery Network Designs in Gate-Level Monolithic 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(6): 992-1003 (2017) - [j66]Shreepad Panth
, Sandeep Kumar Samal
, Kambiz Samadi, Yang Du, Sung Kyu Lim:
Tier Degradation of Monolithic 3-D ICs: A Power Performance Study at Different Technology Nodes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(8): 1265-1273 (2017) - [j65]Tiantao Lu
, Caleb Serafy, Zhiyuan Yang, Sandeep Kumar Samal
, Sung Kyu Lim, Ankur Srivastava:
TSV-Based 3-D ICs: Design Methods and Tools. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(10): 1593-1619 (2017) - [j64]Shreepad Panth
, Kambiz Samadi, Yang Du, Sung Kyu Lim:
Shrunk-2-D: A Physical Design Methodology to Build Commercial-Quality Monolithic 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(10): 1716-1724 (2017) - [j63]Jaewon Jang, Minho Cheong, Jin-Ho Ahn, Sung Kyu Lim, Sungho Kang
:
Chain-Based Approach for Fast Through-Silicon-Via Coupling Delay Estimation. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 1178-1182 (2017) - [j62]Moongon Jung
, Taigon Song, Yarui Peng, Sung Kyu Lim:
Design Methodologies for Low-Power 3-D ICs With Advanced Tier Partitioning. IEEE Trans. Very Large Scale Integr. Syst. 25(7): 2109-2117 (2017) - [j61]Kyungwook Chang
, Kartik Acharya, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim:
Impact and Design Guideline of Monolithic 3-D IC at the 7-nm Technology Node. IEEE Trans. Very Large Scale Integr. Syst. 25(7): 2118-2129 (2017) - [c137]Kyungwook Chang, Abhishek Koneru, Krishnendu Chakrabarty, Sung Kyu Lim:
Design automation and testing of monolithic 3D ICs: Opportunities, challenges, and solutions: (Invited paper). ICCAD 2017: 805-810 - [c136]Kyungwook Chang, Bon Woong Ku, Saurabh Sinha, Sung Kyu Lim:
Full-chip monolithic 3D IC design and power performance analysis with ASAP7 library: (Invited Paper). ICCAD 2017: 1005-1010 - [c135]Kyungwook Chang, Shidhartha Das, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim:
Frequency and time domain analysis of power delivery network for monolithic 3D ICs. ISLPED 2017: 1-6 - [c134]Kyungwook Chang, Deepak Kadetotad, Yu Cao, Jae-sun Seo, Sung Kyu Lim:
Monolithic 3D IC designs for low-power deep neural networks targeting speech recognition. ISLPED 2017: 1-6 - [c133]Bon Woong Ku, Taigon Song, Arthur Nieuwoudt, Sung Kyu Lim:
Transistor-level monolithic 3D standard cell layout optimization for full-chip static power integrity. ISLPED 2017: 1-6 - [c132]Sandeep Kumar Samal, Sourabh Khandelwal
, Asif I. Khan, Sayeef S. Salahuddin, Chenming Hu, Sung Kyu Lim:
Full chip power benefits with negative capacitance FETs. ISLPED 2017: 1-6 - [c131]Austin Wyer, Md Musabbir Adnan, Bon Woong Ku, Sung Kyu Lim, Catherine D. Schuman, Raphael C. Pooser, Garrett S. Rose
:
Evaluating online-learning in memristive neuromorphic circuits. NCS 2017: 5:1-5:8 - 2016
- [j60]Daehyun Kim, Sung Kyu Lim:
Guest Editors' Introduction: Advances in 3-D Integrated Circuits, Systems, and CAD Tools - Part 2. IEEE Des. Test 33(2): 7-8 (2016) - [j59]Lalinthip Tangjittaweechai, Mongkol Ekpanyapong, Thaisiri Watewai, Krit Athikulwongse, Sung Kyu Lim, Adriano Tavares
:
Fast bidirectional shortest path on GPU. IEICE Electron. Express 13(6): 20160036 (2016) - [j58]Yun Seop Yu, Sung Kyu Lim:
Device Coupling Effects of Monolithic 3D Inverters. J. Inform. and Commun. Convergence Engineering 14(1) (2016) - [j57]Sandeep Kumar Samal, Guoqing Chen, Sung Kyu Lim:
Machine Learning Based Variation Modeling and Optimization for 3D ICs. J. Inform. and Commun. Convergence Engineering 14(4) (2016) - [j56]Young-Ho Gong, Jae Min Kim, Sung Kyu Lim, Sung Woo Chung:
Exploration of temperature-aware refresh schemes for 3D stacked eDRAM caches. Microprocess. Microsystems 42: 100-112 (2016) - [j55]Hourieh Attarzadeh, Sung Kyu Lim, Trond Ytterdal:
Design and Analysis of a Stochastic Flash Analog-to-Digital Converter in 3D IC technology for integration with ultrasound transducer array. Microelectron. J. 48: 39-49 (2016) - [j54]Sandeep Kumar Samal, Shreepad Panth, Kambiz Samadi, Mehdi Saedi, Yang Du, Sung Kyu Lim:
Adaptive Regression-Based Thermal Modeling and Optimization for Monolithic 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(10): 1707-1720 (2016) - [j53]Taigon Song
, Shreepad Panth, Yoo-Jin Chae, Sung Kyu Lim:
More Power Reduction With 3-Tier Logic-on-Logic 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(12): 2056-2067 (2016) - [j52]Taigon Song, Chang Liu, Yarui Peng, Sung Kyu Lim:
Full-Chip Signal Integrity Analysis and Optimization of 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 24(5): 1636-1648 (2016) - [c130]Kyungwook Chang, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim:
Match-making for monolithic 3D IC: finding the right technology node. DAC 2016: 77:1-77:6 - [c129]Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Sung Kyu Lim:
How much cost reduction justifies the adoption of monolithic 3D ICs at 7nm node? ICCAD 2016: 87 - [c128]Sandeep Kumar Samal, Deepak Nayak, Motoi Ichihashi, Srinivasa Banna, Sung Kyu Lim:
Tier partitioning strategy to mitigate BEOL degradation and cost issues in monolithic 3D ICs. ICCAD 2016: 129 - [c127]Kyungwook Chang, Saurabh Sinha, Brian Cline, Raney Southerland, Michael Doherty, Greg Yeric, Sung Kyu Lim:
Cascade2D: A design-aware partitioning approach to monolithic 3D IC with 2D commercial tools. ICCAD 2016: 130 - [c126]Kwang Min Kim, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim:
Four-tier Monolithic 3D ICs: Tier Partitioning Methodology and Power Benefit Study. ISLPED 2016: 70-75 - [c125]Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Diederik Verkest, Aaron Thean, Sung Kyu Lim:
Physical Design Solutions to Tackle FEOL/BEOL Degradation in Gate-level Monolithic 3D ICs. ISLPED 2016: 76-81 - [c124]Sandeep Kumar Samal, Deepak Nayak, Motoi Ichihashi, Srinivasa Banna, Sung Kyu Lim:
How to Cope with Slow Transistors in the Top-tier of Monolithic 3D ICs: Design Studies and CAD Solutions. ISLPED 2016: 320-325 - [c123]Kartik Acharya, Kyungwook Chang, Bon Woong Ku, Shreepad Panth, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim:
Monolithic 3D IC design: Power, performance, and area impact at 7nm. ISQED 2016: 41-48 - 2015
- [j51]Dae Hyun Kim, Sung Kyu Lim:
Guest Editors' Introduction: Advances in 3-D Integrated Circuits, Systems, and CAD Tools. IEEE Des. Test 32(4): 6-7 (2015) - [j50]Dae Hyun Kim, Sung Kyu Lim:
Physical Design and CAD Tools for 3-D Integrated Circuits: Challenges and Opportunities. IEEE Des. Test 32(4): 8-22 (2015) - [j49]Taigon Song, Sung Kyu Lim:
Die-to-Die Parasitic Extraction Targeting Face-to-Face Bonded 3D ICs. J. Inform. and Commun. Convergence Engineering 13(3) (2015) - [j48]Taigon Song, Sung Kyu Lim:
Full-Chip Power/Performance Benefits of Carbon Nanotube-Based Circuits. J. Inform. and Commun. Convergence Engineering 13(3) (2015) - [j47]Daehyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim:
Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory). IEEE Trans. Computers 64(1): 112-125 (2015) - [j46]Shreepad Panth, Kambiz Samadi, Yang Du, Sung Kyu Lim:
Placement-Driven Partitioning for Congestion Mitigation in Monolithic 3D IC Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(4): 540-553 (2015) - [j45]Yarui Peng, Dusan Petranovic, Sung Kyu Lim:
Multi-TSV and E-Field Sharing Aware Full-chip Extraction and Mitigation of TSV-to-Wire Coupling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(12): 1964-1976 (2015) - [j44]Brandon Noia, Shreepad Panth, Krishnendu Chakrabarty, Sung Kyu Lim:
Scan Test of Die Logic in 3-D ICs Using TSV Probing. IEEE Trans. Very Large Scale Integr. Syst. 23(2): 317-330 (2015) - [c122]Neela Lohith Penmetsa, Christos P. Sotiriou, Sung Kyu Lim:
Low Power Monolithic 3D IC Design of Asynchronous AES Core. ASYNC 2015: 93-99 - [c121]Yarui Peng, Bon Woong Ku, Youn-Sik Park, Kwang-Il Park, Seong-Jin Jang, Joo-Sun Choi, Sung Kyu Lim:
Design, packaging, and architectural policy co-optimization for DC power integrity in 3D DRAM. DAC 2015: 91:1-91:6 - [c120]Shreepad Panth, Kambiz Samadi, Yang Du, Sung Kyu Lim:
Tier-partitioning for power delivery vs cooling tradeoff in 3D VLSI for mobile applications. DAC 2015: 92:1-92:6 - [c119]Yarui Peng, Taigon Song, Dusan Petranovic, Sung Kyu Lim:
Full-chip Inter-die Parasitic Extraction in Face-to-Face-Bonded 3D ICs. ICCAD 2015: 649-655 - [c118]Tianchen Wang, Sandeep Kumar Samal, Sung Kyu Lim, Yiyu Shi:
A Novel Entropy Production Based Full-Chip TSV Fatigue Analysis. ICCAD 2015: 744-751 - [c117]Taigon Song, Shreepad Panth, Yoo-Jin Chae, Sung Kyu Lim:
Three-Tier 3D ICs for More Power Reduction: Strategies in CAD, Design, and Bonding Selection. ICCAD 2015: 752-757 - [c116]Hourieh Attarzadeh, Sung Kyu Lim, Trond Ytterdal:
Stacking integration methodologies in 3D IC for 3D ultrasound image processing application: A stochastic flash ADC design case study. ISCAS 2015: 1266-1269 - [c115]Kyungwook Chang, Kartik Acharya, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim:
Power benefit study of monolithic 3D IC at the 7nm technology node. ISLPED 2015: 201-206 - [c114]Li Jiang, Pu Pang, Naifeng Jing, Sung Kyu Lim, Xiaoyao Liang, Qiang Xu:
On diagnosable and tunable 3D clock network design for lifetime reliability enhancement. ITC 2015: 1-10 - 2014
- [j43]Moongon Jung, Joydeep Mitra, David Z. Pan, Sung Kyu Lim:
TSV stress-aware full-chip mechanical reliability analysis and optimization for 3D IC. Commun. ACM 57(1): 107-115 (2014) - [j42]Sung Kyu Lim:
Research Needs for TSV-Based 3D IC Architectural Floorplanning. J. Inform. and Commun. Convergence Engineering 12(1): 46-52 (2014) - [j41]Shreepad Panth, Sandeep Kumar Samal, Yun Seop Yu, Sung Kyu Lim:
Design Challenges and Solutions for Ultra-High-Density Monolithic 3D ICs. J. Inform. and Commun. Convergence Engineering 12(3): 186-192 (2014) - [j40]Chang-Chih Chen, Muhammad Bashir, Linda S. Milor
, Daehyun Kim, Sung Kyu Lim:
Simulation of system backend dielectric reliability. Microelectron. J. 45(10): 1327-1334 (2014) - [j39]Daehyun Kim, Saibal Mukhopadhyay, Sung Kyu Lim:
TSV-Aware Interconnect Distribution Models for Prediction of Delay and Power Consumption of 3-D Stacked ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(9): 1384-1395 (2014) - [j38]Jiwoo Pak, Sung Kyu Lim, David Z. Pan:
Electromigration Study for Multiscale Power/Ground Vias in TSV-Based 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(12): 1873-1885 (2014) - [j37]Yarui Peng, Taigon Song, Dusan Petranovic, Sung Kyu Lim:
Silicon Effect-Aware Full-Chip Extraction and Mitigation of TSV-to-TSV Coupling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(12): 1900-1913 (2014) - [j36]Muhammad Muqarrab Bashir, Chang-Chih Chen, Linda Milor, Dae Hyun Kim, Sung Kyu Lim:
Backend Dielectric Reliability Full Chip Simulator. IEEE Trans. Very Large Scale Integr. Syst. 22(8): 1750-1762 (2014) - [j35]Krit Athikulwongse, Mongkol Ekpanyapong, Sung Kyu Lim:
Exploiting Die-to-Die Thermal Coupling in 3-D IC Placement. IEEE Trans. Very Large Scale Integr. Syst. 22(10): 2145-2155 (2014) - [c113]Moongon Jung, Taigon Song, Yang Wan, Yarui Peng, Sung Kyu Lim:
On Enhancing Power Benefits in 3D ICs: Block Folding and Bonding Styles Perspective. DAC 2014: 4:1-4:6 - [c112]Yarui Peng, Dusan Petranovic, Sung Kyu Lim:
Fast and Accurate Full-chip Extraction and Optimization of TSV-to-Wire Coupling. DAC 2014: 28:1-28:6 - [c111]Shreepad Panth, Kambiz Samadi, Yang Du, Sung Kyu Lim:
Power-Performance Study of Block-Level Monolithic 3D-ICs Considering Inter-Tier Performance Variations. DAC 2014: 62:1-62:6 - [c110]Sandeep Kumar Samal, Shreepad Panth, Kambiz Samadi, Mehdi Saedi, Yang Du, Sung Kyu Lim:
Fast and Accurate Thermal Modeling and Optimization for Monolithic 3D ICs. DAC 2014: 206:1-206:6 - [c109]Young-Joon Lee, Sung Kyu Lim:
On GPU bus power reduction with 3D IC technologies. DATE 2014: 1-6 - [c108]Sandeep Kumar Samal, Kambiz Samadi, Pratyush Kamal, Yang Du, Sung Kyu Lim:
Full chip impact study of power delivery network designs in monolithic 3D ICs. ICCAD 2014: 565-572 - [c107]Shreepad A. Panth, Kambiz Samadi, Yang Du, Sung Kyu Lim:
Design and CAD methodologies for low power gate-level monolithic 3D ICs. ISLPED 2014: 171-176 - [c106]Shreepad Panth, Kambiz Samadi, Yang Du, Sung Kyu Lim:
Placement-driven partitioning for congestion mitigation in monolithic 3D IC designs. ISPD 2014: 47-54 - 2013
- [j34]Krit Athikulwongse, Jae-Seok Yang, David Z. Pan, Sung Kyu Lim:
Impact of Mechanical Stress on the Full Chip Timing for Through-Silicon-Via-based 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(6): 905-917 (2013) - [j33]Moongon Jung, David Z. Pan, Sung Kyu Lim:
Chip/Package Mechanical Stress Impact on 3-D IC Reliability and Mobility Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(11): 1694-1707 (2013) - [j32]Sai Manoj Pudukotai Dinakarrao
, Hao Yu
, Yang Shang, Chuan Seng Tan, Sung Kyu Lim:
Reliable 3-D Clock-Tree Synthesis Considering Nonlinear Capacitive TSV Model With Electrical-Thermal-Mechanical Coupling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(11): 1734-1747 (2013) - [j31]Young-Joon Lee, Sung Kyu Lim:
Ultrahigh Density Logic Designs Using Monolithic 3-D Integration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(12): 1892-1905 (2013) - [j30]Dae Hyun Kim, Krit Athikulwongse, Sung Kyu Lim:
Study of Through-Silicon-Via Impact on the 3-D Stacked IC Layout. IEEE Trans. Very Large Scale Integr. Syst. 21(5): 862-874 (2013) - [j29]Junghee Lee, Chrysostomos Nicopoulos
, Hyung Gyu Lee, Shreepad Panth, Sung Kyu Lim, Jongman Kim:
IsoNet: Hardware-Based Job Queue Management for Many-Core Architectures. IEEE Trans. Very Large Scale Integr. Syst. 21(6): 1080-1093 (2013) - [c105]Shreepad Panth, Kambiz Samadi, Sung Kyu Lim:
Test-TSV estimation during 3D-IC partitioning. 3DIC 2013: 1-7 - [c104]Shreepad Panth, Kambiz Samadi, Yang Du, Sung Kyu Lim:
High-density integration of functional modules using monolithic 3D-IC technology. ASP-DAC 2013: 681-686 - [c103]Krit Athikulwongse, Dae Hyun Kim, Moongon Jung, Sung Kyu Lim:
Block-level designs of die-to-wafer bonded 3D ICs and their design quality tradeoffs. ASP-DAC 2013: 687-692 - [c102]Yang Shang, Chun Zhang, Hao Yu, Chuan Seng Tan, Xin Zhao, Sung Kyu Lim:
Thermal-reliable 3D clock-tree synthesis considering nonlinear electrical-thermal-coupled TSV model. ASP-DAC 2013: 693-698 - [c101]Moongon Jung, Taigon Song, Yang Wan, Young-Joon Lee, Debabrata Mohapatra, Hong Wang, Greg Taylor, Devang Jariwala, Vijay Pitchumani, Patrick Morrow, Clair Webb, Paul Fischer, Sung Kyu Lim:
How to reduce power in 3D IC designs: A case study with OpenSPARC T2 core. CICC 2013: 1-4 - [c100]Young-Joon Lee, Daniel B. Limbrick, Sung Kyu Lim:
Power benefit study for ultra-high density transistor-level monolithic 3D ICs. DAC 2013: 104:1-104:10 - [c99]Taigon Song, Chang Liu, Yarui Peng, Sung Kyu Lim:
Full-chip multiple TSV-to-TSV coupling extraction and optimization in 3D ICs. DAC 2013: 180:1-180:7 - [c98]Yarui Peng, Taigon Song, Dusan Petranovic, Sung Kyu Lim:
On accurate full-chip extraction and optimization of TSV-to-TSV coupling elements in 3D ICs. ICCAD 2013: 281-288 - [c97]Xin Zhao, Yang Wan, Michael Scheuermann, Sung Kyu Lim:
Transient modeling of TSV-wire electromigration and lifetime analysis of power distribution network for 3D ICs. ICCAD 2013: 363-370 - [c96]