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ORCIDSung Kyu Lim
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- affiliation: Georgia Institute of Technology, Atlanta GA, USA
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2020 – today
- 2024
[j109]Sai Pentapati
, Kyungwook Chang, Sung Kyu Lim:
Pin-3D: Effective Physical Design Methodology for Multidie Co-Optimization in Monolithic 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(4): 1009-1022 (2024)- [j108]Nesara Eranna Bethur, Anthony Agnesina, Moritz Brunion, Alberto García Ortiz, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Matheus A. Cavalcante, Samuel Riedel, Luca Benini, Sung Kyu Lim:
Hier-3D: A Methodology for Physical Hierarchy Exploration of 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(7): 1957-1970 (2024) - [j107]Yen-Hsiang Huang, Sai Pentapati, Anthony Agnesina, Moritz Brunion, Sung Kyu Lim:
On Legalization of Die Bonding Bumps and Pads for 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(9): 2741-2754 (2024) - [j106]Yi-Chen Lu, Haoxing Ren, Hao-Hsiang Hsiao, Sung Kyu Lim:
GAN-Place: Advancing Open Source Placers to Commercial-quality Using Generative Adversarial Networks and Transfer Learning. ACM Trans. Design Autom. Electr. Syst. 29(2): 32:1-32:17 (2024) - [j105]Jinwoo Kim, Lingjun Zhu, Hakki Mert Torun, Madhavan Swaminathan, Sung Kyu Lim:
A PPA Study for Heterogeneous 3-D IC Options: Monolithic, Hybrid Bonding, and Microbumping. IEEE Trans. Very Large Scale Integr. Syst. 32(3): 401-412 (2024) - [j104]Sai Pentapati, Sung Kyu Lim:
Heterogeneous Monolithic 3-D IC Designs: Challenges, EDA Solutions, and Power, Performance, Cost Tradeoffs. IEEE Trans. Very Large Scale Integr. Syst. 32(3): 413-421 (2024) - [c205]Hao-Hsiang Hsiao, Pruek Vanna-Iampikul, Yi-Chen Lu, Sung Kyu Lim:
ML-based Physical Design Parameter Optimization for 3D ICs: From Parameter Selection to Optimization. DAC 2024: 252:1-252:6 - [c204]Nesara Eranna Bethur, Pruek Vanna-Iampikul, Odysseas Zografos, Lingjun Zhu, Giuliano Sisto, Dragomir Milojevic, Alberto García Ortiz, Geert Hellings, Julien Ryckaert, Francky Catthoor, Sung Kyu Lim:
GNN-assisted Back-side Clock Routing Methodology for Advance Technologies. DAC 2024: 287:1-287:6 - [c203]Lingjun Zhu, Jiawei Hu, Gauthaman Murali, Sung Kyu Lim:
Hetero-3D: Maximizing Performance and Power Delivery Benefits of Heterogeneous 3D ICs. ISLPED 2024: 1-6 - [c202]Hao-Hsiang Hsiao, Yi-Chen Lu, Pruek Vanna-Iampikul, Sung Kyu Lim:
FastTuner: Transferable Physical Design Parameter Optimization using Fast Reinforcement Learning. ISPD 2024: 93-101 - [c201]Pruek Vanna-Iampikul, Hang Yang, Jungyoun Kwak, Joyce X. Hu, Amaan Rahman, Nesara Eranna Bethur, Callie Hao, Shimeng Yu, Sung Kyu Lim:
Back-side Design Methodology for Power Delivery Network and Clock Routing. VLSI Technology and Circuits 2024: 1-2 - [i6]Boxun Xu, Junyoung Hwang, Pruek Vanna-Iampikul, Sung Kyu Lim, Peng Li:
Spiking Transformer Hardware Accelerators in 3D Integration. CoRR abs/2411.07397 (2024) - [i5]Boxun Xu, Junyoung Hwang, Pruek Vanna-Iampikul, Yuxuan Yin, Sung Kyu Lim, Peng Li:
Towards 3D Acceleration for low-power Mixture-of-Experts and Multi-Head Attention Spiking Transformers. CoRR abs/2412.05540 (2024) - 2023
- [j103]Jeffrey S. Vetter, Prasanna Date, Farah Fahim, Shruti R. Kulkarni, Petro Maksymovych, A. Alec Talin, Marc González Tallada, Pruek Vanna-Iampikul, Aaron R. Young, David Brooks, Yu Cao, Gu-Yeon Wei, Sung Kyu Lim, Frank Liu, Matthew J. Marinella, Bobby G. Sumpter, Narasinga Rao Miniskar:
Abisko: Deep codesign of an architecture for spiking neural networks using novel neuromorphic materials. Int. J. High Perform. Comput. Appl. 37(3-4): 351-379 (2023) - [j102]Anthony Agnesina, Kyungwook Chang, Sung Kyu Lim:
Parameter Optimization of VLSI Placement Through Deep Reinforcement Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(4): 1295-1308 (2023) - [j101]Pruek Vanna-Iampikul, Chengjia Shao, Yi-Chen Lu, Sai Pentapati, Yun Heo, Jae-Seung Choi, Sung Kyu Lim:
Snap-3D: A Constrained Placement-Driven Physical Design Methodology for High Performance 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(7): 2331-2335 (2023) - [j100]Shao-Chun Hung, Sanmitra Banerjee, Arjun Chaudhuri, Jinwoo Kim, Sung Kyu Lim, Krishnendu Chakrabarty:
Transferable Graph Neural Network-Based Delay-Fault Localization for Monolithic 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 4296-4309 (2023) - [j99]Yi-Chen Lu, Siddhartha Nath, Sai Pentapati, Sung Kyu Lim:
ECO-GNN: Signoff Power Prediction Using Graph Neural Networks with Subgraph Approximation. ACM Trans. Design Autom. Electr. Syst. 28(4): 55:1-55:22 (2023) - [j98]Gauthaman Murali, Anthony Agnesina, Sung Kyu Lim:
A PPA Study of Reinforced Placement Parameter Autotuning: Pseudo-3D vs. True-3D Placers. ACM Trans. Design Autom. Electr. Syst. 28(5): 75:1-75:22 (2023) - [j97]Pruek Vanna-Iampikul, Yi-Chen Lu, Da Eun Shim, Sung Kyu Lim:
GNN-based Multi-bit Flip-flop Clustering and Post-clustering Design Optimization for Energy-efficient 3D ICs. ACM Trans. Design Autom. Electr. Syst. 28(5): 76:1-76:26 (2023) - [j96]Arjun Chaudhuri, Sanmitra Banerjee, Jinwoo Kim, Sung Kyu Lim, Krishnendu Chakrabarty:
Built-In Self-Test of High-Density and Realistic ILV Layouts in Monolithic 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 31(3): 296-309 (2023) - [j95]Gauthaman Murali, Aditya Iyer, Lingjun Zhu, Jianming Tong, Francisco Muñoz-Martínez, Srivatsa Rangachar Srinivasa, Tanay Karnik, Tushar Krishna, Sung Kyu Lim:
On Continuing DNN Accelerator Architecture Scaling Using Tightly Coupled Compute-on-Memory 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 31(10): 1603-1613 (2023) - [c200]Yi-Chen Lu, Wei-Ting Chan, Deyuan Guo, Sudipto Kundu, Vishal Khandelwal, Sung Kyu Lim:
RL-CCD: Concurrent Clock and Data Optimization using Attention-Based Self-Supervised Reinforcement Learning. DAC 2023: 1-6 - [c199]Pruek Vanna-Iampikul, Lingjun Zhu, Serhat Erdogan, Mohanalingam Kathaperumal, Ravi Agarwal, Ram Gupta, Kevin Rinebold, Sung Kyu Lim:
Glass Interposer Integration of Logic and Memory Chiplets: PPA and Power/Signal Integrity Benefits. DAC 2023: 1-6 - [c198]Lingjun Zhu, Sung Kyu Lim:
INVITED: Design Automation Needs for Monolithic 3D ICs: Accomplishments and Gaps. DAC 2023: 1-4 - [c197]Tathagata Srimani, Robert M. Radway, Jinwoo Kim, Kartik Prabhu, Dennis Rich, Carlo Gilardi, Priyanka Raina, Max M. Shulaker, Sung Kyu Lim, Subhasish Mitra:
Ultra-Dense 3D Physical Design Unlocks New Architectural Design Points with Large Benefits. DATE 2023: 1-6 - [c196]Jonti Talukdar, Arjun Chaudhuri, Jinwoo Kim, Sung Kyu Lim, Krishnendu Chakrabarty:
Securing Heterogeneous 2.5D ICs Against IP Theft through Dynamic Interposer Obfuscation. DATE 2023: 1-2 - [c195]Gauthaman Murali, Aditya Iyer, Navneeth Ravichandran, Sung Kyu Lim:
3DNN-Xplorer: A Machine Learning Framework for Design Space Exploration of Heterogeneous 3D DNN Accelerators. ICCAD 2023: 1-9 - [c194]Narasinga Rao Miniskar, Pruek Vanna-Iampikul, Aaron R. Young, Sung Kyu Lim, Frank Liu, Jieun Yoo, Corrinne Mills, Nhan Tran, Farah Fahim, Jeffrey S. Vetter:
A 3D Implementation of Convolutional Neural Network for Fast Inference. ISCAS 2023: 1-5 - [c193]Sandra Maria Shaji, Lingjun Zhu, Jun-Sik Yoon, Sung Kyu Lim:
A Comparative Study on Front-Side, Buried and Back-Side Power Rail Topologies in 3nm Technology Node. ISLPED 2023: 1-6 - [c192]Sai Pentapati, Anthony Agnesina, Moritz Brunion, Yen-Hsiang Huang, Sung Kyu Lim:
On Legalization of Die Bonding Bumps and Pads for 3D ICs. ISPD 2023: 62-70 - [c191]Yi-Chen Lu, Haoxing Ren, Hao-Hsiang Hsiao, Sung Kyu Lim:
DREAM-GAN: Advancing DREAMPlace towards Commercial-Quality using Generative Adversarial Learning. ISPD 2023: 141-148 - 2022
- [j94]Yandong Luo, Sourav Dutta, Ankit Kaul, Sung Kyu Lim, Muhannad S. Bakir, Suman Datta, Shimeng Yu:
A Compute-in-Memory Hardware Accelerator Design With Back-End-of-Line (BEOL) Transistor Based Reconfigurable Interconnect. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(2): 445-457 (2022) - [j93]Edward Lee, Daehyun Kim, Jinwoo Kim, Sung Kyu Lim, Saibal Mukhopadhyay:
A ReRAM Memory Compiler for Monolithic 3D Integrated Circuits in a Carbon Nanotube Process. ACM J. Emerg. Technol. Comput. Syst. 18(1): 20:1-20:20 (2022) - [j92]Lingjun Zhu, Arjun Chaudhuri, Sanmitra Banerjee, Gauthaman Murali, Pruek Vanna-Iampikul, Krishnendu Chakrabarty, Sung Kyu Lim:
Design Automation and Test Solutions for Monolithic 3D ICs. ACM J. Emerg. Technol. Comput. Syst. 18(1): 21:1-21:49 (2022) - [j91]Arjun Chaudhuri, Sanmitra Banerjee, Jinwoo Kim, Heechun Park, Bon Woong Ku, Sukeshwar Kannan, Krishnendu Chakrabarty, Sung Kyu Lim:
Built-in Self-Test and Fault Localization for Inter-Layer Vias in Monolithic 3D ICs. ACM J. Emerg. Technol. Comput. Syst. 18(1): 22:1-22:37 (2022) - [j90]Bon Woong Ku, Catherine D. Schuman, Md Musabbir Adnan, Tiffany M. Mintz, Raphael C. Pooser, Kathleen E. Hamilton, Garrett S. Rose, Sung Kyu Lim:
Unsupervised Digit Recognition Using Cosine Similarity In A Neuromemristive Competitive Learning System. ACM J. Emerg. Technol. Comput. Syst. 18(2): 38:1-38:20 (2022) - [j89]Kyungwook Chang, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim:
Design-Aware Partitioning-Based 3-D IC Design Flow With 2-D Commercial Tools. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(3): 410-423 (2022) - [j88]Yi-Chen Lu, Jeehyun Lee, Anthony Agnesina, Kambiz Samadi, Sung Kyu Lim:
A Clock Tree Prediction and Optimization Framework Using Generative Adversarial Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(9): 3104-3117 (2022) - [j87]Yi-Chen Lu, Sai Pentapati, Lingjun Zhu, Gauthaman Murali, Kambiz Samadi, Sung Kyu Lim:
A Machine Learning-Powered Tier Partitioning Methodology for Monolithic 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4575-4586 (2022) - [j86]Sai Pentapati, Sung Kyu Lim:
Metal Layer Sharing: A Routing Optimization Technique for Monolithic 3D ICs. IEEE Trans. Very Large Scale Integr. Syst. 30(9): 1355-1367 (2022) - [c190]Matheus A. Cavalcante, Anthony Agnesina, Samuel Riedel, Moritz Brunion, Alberto García-Ortiz, Dragomir Milojevic, Francky Catthoor, Sung Kyu Lim, Luca Benini:
MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration. DATE 2022: 394-399 - [c189]Yi-Chen Lu, Sung Kyu Lim:
On Advancing Physical Design Using Graph Neural Networks. ICCAD 2022: 2:1-2:7 - [c188]Anthony Agnesina, Moritz Brunion, Alberto García Ortiz, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Matheus A. Cavalcante, Samuel Riedel, Luca Benini, Sung Kyu Lim:
Hier-3D: A Hierarchical Physical Design Methodology for Face-to-Face-Bonded 3D ICs. ISLPED 2022: 15:1-15:6 - [c187]Lingjun Zhu, Nesara Eranna Bethur, Yi-Chen Lu, Youngsang Cho, Yunhyeok Im, Sung Kyu Lim:
3D IC Tier Partitioning of Memory Macros: PPA vs. Thermal Tradeoffs. ISLPED 2022: 19:1-19:6 - [c186]Gauthaman Murali, Sandra Maria Shaji, Anthony Agnesina, Guojie Luo, Sung Kyu Lim:
ART-3D: Analytical 3D Placement with Reinforced Parameter Tuning for Monolithic 3D ICs. ISPD 2022: 97-104 - [c185]Sai Pentapati, Sung Kyu Lim:
Routing Layer Sharing: A New Opportunity for Routing Optimization in Monolithic 3D ICs. ISPD 2022: 127-134 - [c184]Yi-Chen Lu, Tian Yang, Sung Kyu Lim, Haoxing Ren:
Placement Optimization via PPA-Directed Graph Clustering. MLCAD 2022: 1-6 - [c183]Yi-Chen Lu, Wei-Ting Chan, Vishal Khandelwal, Sung Kyu Lim:
Driving Early Physical Synthesis Exploration through End-of-Flow Total Power Prediction. MLCAD 2022: 97-102 - 2021
- [j85]Heechun Park, Bon Woong Ku, Kyungwook Chang, Da Eun Shim, Sung Kyu Lim:
Pseudo-3D Physical Design Flow for Monolithic 3D ICs: Comparisons and Enhancements. ACM Trans. Design Autom. Electr. Syst. 26(5): 37:1-37:25 (2021) - [j84]Gauthaman Murali, Xiaoyu Sun, Shimeng Yu, Sung Kyu Lim:
Heterogeneous Mixed-Signal Monolithic 3-D In-Memory Computing Using Resistive RAM. IEEE Trans. Very Large Scale Integr. Syst. 29(2): 386-396 (2021) - [j83]Gauthaman Murali, Heechun Park, Eric Qin, Hakki Mert Torun, Majid Ahadi Dolatsara, Madhavan Swaminathan, Tushar Krishna, Sung Kyu Lim:
Clock Delivery Network Design and Analysis for Interposer-Based 2.5-D Heterogeneous Systems. IEEE Trans. Very Large Scale Integr. Syst. 29(4): 605-616 (2021) - [j82]Lingjun Zhu, Lennart Bamberg, Sai Surya Kiran Pentapati, Kyungwook Chang, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Brian Cline, Saurabh Sinha, Xiaoqing Xu, Alberto García-Ortiz, Sung Kyu Lim:
High-Performance Logic-on-Memory Monolithic 3-D IC Designs for Arm Cortex-A Processors. IEEE Trans. Very Large Scale Integr. Syst. 29(6): 1152-1163 (2021) - [j81]Shao-Chun Hung, Yi-Chen Lu, Sung Kyu Lim, Krishnendu Chakrabarty:
Power Supply Noise-Aware At-Speed Delay Fault Testing of Monolithic 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 29(11): 1875-1888 (2021) - [c182]Yi-Chen Lu, Siddhartha Nath, Vishal Khandelwal, Sung Kyu Lim:
RL-Sizer: VLSI Gate Sizing for Timing Optimization using Deep Reinforcement Learning. DAC 2021: 733-738 - [c181]Sai Surya Kiran Pentapati, Sung Kyu Lim:
Heterogeneous Monolithic 3D ICs: EDA Solutions, and Power, Performance, Cost Tradeoffs. DAC 2021: 925-930 - [c180]Jinwoo Kim, Lingjun Zhu, Hakki Mert Torun, Madhavan Swaminathan, Sung Kyu Lim:
Micro-bumping, Hybrid Bonding, or Monolithic? A PPA Study for Heterogeneous 3D IC Options. DAC 2021: 1189-1194 - [c179]Gauthaman Murali, Sung Kyu Lim:
Heterogeneous 3D ICs: Current Status and Future Directions for Physical Design Technologies. DATE 2021: 146-151 - [c178]Bahar Asgari, Ramyad Hadidi, Jiashen Cao, Da Eun Shim, Sung Kyu Lim, Hyesoon Kim:
FAFNIR: Accelerating Sparse Gathering by Using Efficient Near-Memory Intelligent Reduction. HPCA 2021: 908-920 - [c177]Sanmitra Banerjee, Arjun Chaudhuri, Jinwoo Kim, Gauthaman Murali, Mark Nelson, Sung Kyu Lim, Krishnendu Chakrabarty:
ParaMitE: Mitigating Parasitic CNFETs in the Presence of Unetched CNTs. ICCAD 2021: 1-9 - [c176]Johann Knechtel, Jayanth Gopinath, Jitendra Bhandari, Mohammed Ashraf, Hussam Amrouch, Shekhar Borkar, Sung Kyu Lim, Ozgur Sinanoglu, Ramesh Karri:
Security Closure of Physical Layouts ICCAD Special Session Paper. ICCAD 2021: 1-9 - [c175]Yi-Chen Lu, Siddhartha Nath, Vishal Khandelwal, Sung Kyu Lim:
Doomed Run Prediction in Physical Design by Exploiting Sequential Flow and Graph Learning. ICCAD 2021: 1-9 - [c174]Anthony Agnesina, Moritz Brunion, Jinwoo Kim, Alberto García Ortiz, Dragomir Milojevic, Francky Catthoor, Manu Perumkunnil, Sung Kyu Lim:
Power, Performance, Area and Cost Analysis of Memory-on-Logic Face-to-Face Bonded 3D Processor Designs. ISLPED 2021: 1-6 - [c173]Lingjun Zhu, Tuan Ta, Rossana Liu, Rahul Mathur, Xiaoqing Xu, Shidhartha Das, Ankit Kaul, Alejandro Rico, Doug Joseph, Brian Cline, Sung Kyu Lim:
Power Delivery and Thermal-Aware Arm-Based Multi-Tier 3D Architecture. ISLPED 2021: 1-6 - [c172]Yi-Chen Lu, Sai Pentapati, Sung Kyu Lim:
The Law of Attraction: Affinity-Aware Placement Optimization using Graph Neural Networks. ISPD 2021: 7-14 - [c171]Pruek Vanna-Iampikul, Chengjia Shao, Yi-Chen Lu, Sai Pentapati, Sung Kyu Lim:
Snap-3D: A Constrained Placement-Driven Physical Design Methodology for Face-to-Face-Bonded 3D ICs. ISPD 2021: 39-46 - [c170]Sai Surya Kiran Pentapati, Bon Woong Ku, Sung Kyu Lim:
ML-Based Wire RC Prediction in Monolithic 3D ICs with an Application to Full-Chip Optimization. ISPD 2021: 75-82 - [c169]Lingjun Zhu, Sung Kyu Lim:
Physical Design Challenges and Solutions for Emerging Heterogeneous 3D Integration Technologies. ISPD 2021: 127-134 - [c168]Jan Moritz Joseph, Ananda Samajdar, Lingjun Zhu, Rainer Leupers, Sung Kyu Lim, Thilo Pionteck, Tushar Krishna:
Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators. ISQED 2021: 60-66 - [c167]Brian Crafton, Arijit Raychowdhury, Sung Kyu Lim:
Automatic Generation of Translators for Packet-Based and Emerging Protocols. ISQED 2021: 488-495 - [i4]Matheus A. Cavalcante, Anthony Agnesina, Samuel Riedel, Moritz Brunion, Alberto García-Ortiz, Dragomir Milojevic, Francky Catthoor, Sung Kyu Lim, Luca Benini:
MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration. CoRR abs/2112.01168 (2021) - 2020
- [j80]Lingjun Zhu, Lennart Bamberg, Anthony Agnesina, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Julien Ryckaert, Alberto García-Ortiz, Sung Kyu Lim:
Heterogeneous 3D Integration for a RISC-V System With STT-MRAM. IEEE Comput. Archit. Lett. 19(1): 51-54 (2020) - [j79]Arjun Chaudhuri, Sanmitra Banerjee, Heechun Park, Jinwoo Kim, Gauthaman Murali, Edward Lee, Daehyun Kim, Sung Kyu Lim, Saibal Mukhopadhyay, Krishnendu Chakrabarty:
Advances in Design and Test of Monolithic 3-D ICs. IEEE Des. Test 37(4): 92-100 (2020) - [j78]Bon Woong Ku, Kyungwook Chang, Sung Kyu Lim:
Compact-2D: A Physical Design Methodology to Build Two-Tier Gate-Level 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(6): 1151-1164 (2020) - [j77]Anthony Agnesina, Sung Kyu Lim, Etienne Lepercq, Jose Escobedo Del Cid:
Improving FPGA-Based Logic Emulation Systems through Machine Learning. ACM Trans. Design Autom. Electr. Syst. 25(5): 46:1-46:20 (2020) - [j76]Anthony Agnesina, James Yamaguchi, Christian Krutzik, John Carson, Jean Yang-Scharlotta, Sung Kyu Lim:
A COTS-Based Novel 3-D DRAM Memory Cube Architecture for Space Applications. IEEE Trans. Very Large Scale Integr. Syst. 28(9): 2055-2068 (2020) - [j75]Jinwoo Kim, Gauthaman Murali, Heechun Park, Eric Qin, Hyoukjun Kwon, Venkata Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Nihar Dasari, Arvind Singh, Minah Lee, Hakki Mert Torun, Kallol Roy, Madhavan Swaminathan, Saibal Mukhopadhyay, Tushar Krishna, Sung Kyu Lim:
Architecture, Chip, and Package Codesign Flow for Interposer-Based 2.5-D Chiplet Integration Enabling Heterogeneous IP Reuse. IEEE Trans. Very Large Scale Integr. Syst. 28(11): 2424-2437 (2020) - [c166]Shao-Chun Hung, Yi-Chen Lu, Sung Kyu Lim, Krishnendu Chakrabarty:
Power Supply Noise-Aware Scan Test Pattern Reshaping for At-Speed Delay Fault Testing of Monolithic 3D ICs *. ATS 2020: 1-6 - [c165]Yi-Chen Lu, Sai Surya Kiran Pentapati, Lingjun Zhu, Kambiz Samadi, Sung Kyu Lim:
TP-GNN: A Graph Neural Network Framework for Tier Partitioning in Monolithic 3D ICs. DAC 2020: 1-6 - [c164]Lennart Bamberg, Alberto García Ortiz, Lingjun Zhu, Sai Pentapati, Da Eun Shim, Sung Kyu Lim:
Macro-3D: A Physical Design Methodology for Face-to-Face-Stacked Heterogeneous 3D ICs. DATE 2020: 37-42 - [c163]Sai Surya Kiran Pentapati, Kyungwook Chang, Vassilios Gerousis, Rwik Sengupta, Sung Kyu Lim:
Pin-3D: A Physical Synthesis and Post-Layout Optimization Flow for Heterogeneous Monolithic 3D ICs. ICCAD 2020: 4:1-4:9 - [c162]Jinwoo Kim, Gauthaman Murali, Pruek Vanna-Iampikul, Edward Lee, Daehyun Kim, Arjun Chaudhuri, Sanmitra Banerjee, Krishnendu Chakrabarty, Saibal Mukhopadhyay, Sung Kyu Lim:
RTL-to-GDS Design Tools for Monolithic 3D ICs. ICCAD 2020: 126:1-126:8 - [c161]Anthony Agnesina, Kyungwook Chang, Sung Kyu Lim:
VLSI Placement Parameter Optimization using Deep Reinforcement Learning. ICCAD 2020: 144:1-144:9 - [c160]Yi-Chen Lu, Siddhartha Nath, Sai Surya Kiran Pentapati, Sung Kyu Lim:
A Fast Learning-Driven Signoff Power Optimization Framework. ICCAD 2020: 161:1-161:9 - [c159]Jinwoo Kim, Venkata Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Majid Ahadi Dolatsara, Hakki Mert Torun, Madhavan Swaminathan, Saibal Mukhopadhyay, Sung Kyu Lim:
Silicon vs. Organic Interposer: PPA and Reliability Tradeoffs in Heterogeneous 2.5D Chiplet Integration. ICCD 2020: 80-87 - [c158]Anthony Agnesina, Da Eun Shim, James Yamaguchi, Christian Krutzik, John Carson, Dan Nakamura, Sung Kyu Lim:
A Fault-Tolerant and High-Speed Memory Controller Targeting 3D Flash Memory Cubes for Space Applications. ICCD 2020: 425-432 - [c157]Bon Woong Ku, Sung Kyu Lim:
Pin-in-the-middle: an efficient block pin assignment methodology for block-level monolithic 3D ICs. ISLPED 2020: 85-90 - [c156]Lingjun Zhu, Kyungwook Chang, Dusan Petranovic, Saurabh Sinha, Yun Seop Yu, Sung Kyu Lim:
Full-Chip Electro-Thermal Coupling Extraction and Analysis for Face-to-Face Bonded 3D ICs. ISPD 2020: 39-46 - [c155]Heechun Park, Bon Woong Ku, Kyungwook Chang, Da Eun Shim, Sung Kyu Lim:
Pseudo-3D Approaches for Commercial-Grade RTL-to-GDS Tool Flow Targeting Monolithic 3D ICs. ISPD 2020: 47-54 - [c154]Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna, Sung Kyu Lim, Arijit Raychowdhury:
Breaking Barriers: Maximizing Array Utilization for Compute in-Memory Fabrics. VLSI-SOC 2020: 123-128 - [c153]Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna, Sung Kyu Lim, Arijit Raychowdhury:
Statistical Array Allocation and Partitioning for Compute In-Memory Fabrics. VLSI-SoC (Selected Papers) 2020: 323-341 - [i3]Fares Elsabbagh, Blaise Tine, Priyadarshini Roshan, Ethan Lyons, Euna Kim, Da Eun Shim, Lingjun Zhu, Sung Kyu Lim, Hyesoon Kim:
Vortex: OpenCL Compatible RISC-V GPGPU. CoRR abs/2002.12151 (2020) - [i2]Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna, Sung Kyu Lim, Arijit Raychowdhury:
Breaking Barriers: Maximizing Array Utilization for Compute In-Memory Fabrics. CoRR abs/2008.06741 (2020) - [i1]Jan Moritz Joseph, Ananda Samajdar, Lingjun Zhu, Rainer Leupers, Sung Kyu Lim, Thilo Pionteck, Tushar Krishna:
Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators. CoRR abs/2012.12563 (2020)
2010 – 2019
- 2019
- [j74]Sai Pentapati, Lingjun Zhu, Lennart Bamberg, Da Eun Shim, Alberto García Ortiz, Sung Kyu Lim:
A Logic-on-Memory Processor-System Design With Monolithic 3-D Technology. IEEE Micro 39(6): 38-45 (2019) - [j73]Tianchen Wang, Sandeep Kumar Samal, Sung Kyu Lim, Yiyu Shi:
Entropy Production-Based Full-Chip Fatigue Analysis: From Theory to Mobile Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(1): 84-95 (2019) - [j72]Kyungwook Chang, Shidhartha Das, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim:
System-Level Power Delivery Network Analysis and Optimization for Monolithic 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 27(4): 888-898 (2019) - [c152]Heechun Park, Kyungwook Chang, Bon Woong Ku, Jinwoo Kim, Edward Lee, Daehyun Kim, Arjun Chaudhuri, Sanmitra Banerjee, Saibal Mukhopadhyay, Krishnendu Chakrabarty, Sung Kyu Lim:
RTL-to-GDS Tool Flow and Design-for-Test Solutions for Monolithic 3D ICs. DAC 2019: 101 - [c151]Jinwoo Kim, Gauthaman Murali, Heechun Park, Eric Qin, Hyoukjun Kwon, Venkata Chaitanya Krishna Chekuri, Nihar Dasari, Arvind Singh, Minah Lee, Hakki Mert Torun, Kallol Roy, Madhavan Swaminathan, Saibal Mukhopadhyay, Tushar Krishna, Sung Kyu Lim:
Architecture, Chip, and Package Co-design Flow for 2.5D IC Design Enabling Heterogeneous IP Reuse. DAC 2019: 178 - [c150]Arjun Chaudhuri, Sanmitra Banerjee, Heechun Park, Bon Woong Ku, Krishnendu Chakrabarty, Sung Kyu Lim:
Built-in Self-Test for Inter-Layer Vias in Monolithic 3D ICs. ETS 2019: 1-6 - [c149]Sai Surya Kiran Pentapati, Da Eun Shim, Sung Kyu Lim:
Logic Monolithic 3D ICs: PPA Benefits and EDA Tools Necessary. ACM Great Lakes Symposium on VLSI 2019: 445-450 - [c148]Anthony Agnesina, Etienne Lepercq, Jose Escobedo, Sung Kyu Lim:
Reducing Compilation Effort in Commercial FPGA Emulation Systems Using Machine Learning. ICCAD 2019: 1-8 - [c147]Yi-Chen Lu, Jeehyun Lee, Anthony Agnesina, Kambiz Samadi, Sung Kyu Lim:
GAN-CTS: A Generative Adversarial Framework for Clock Tree Prediction and Optimization. ICCAD 2019: 1-8 - [c146]Hakki Mert Torun, Huan Yu, Nihar Dasari, Venkata Chaitanya Krishna Chekuri, Arvind Singh, Jinwoo Kim, Sung Kyu Lim, Saibal Mukhopadhyay, Madhavan Swaminathan:
A Spectral Convolutional Net for Co-Optimization of Integrated Voltage Regulators and Embedded Inductors. ICCAD 2019: 1-8 - [c145]Da Eun Shim, Sai Pentapati, Jeehyun Lee, Yun Seop Yu, Sung Kyu Lim:
Tier Partitioning and Flip-flop Relocation Methods for Clock Trees in Monolithic 3D ICs. ISLPED 2019: 1-6 - 2018
- [j71]Kyungwook Chang, Deepak Kadetotad, Yu Cao, Jae-sun Seo, Sung Kyu Lim:
Power, Performance, and Area Benefit of Monolithic 3D ICs for On-Chip Deep Neural Networks Targeting Speech Recognition. ACM J. Emerg. Technol. Comput. Syst. 14(4): 42:1-42:19 (2018) - [c144]Anthony Agnesina, Amanvir Sidana, James Yamaguchi, Christian Krutzik, John Carson, Jean Yang-Scharlotta, Sung Kyu Lim:
A novel 3D DRAM memory cube architecture for space applications. DAC 2018: 24:1-24:6 - [c143]Bon Woong Ku, Yu Liu, Yingyezhe Jin, Sandeep Kumar Samal, Peng Li, Sung Kyu Lim: