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Journal Articles
- 2020
- [j43]Ludovico Minati, Korkut Kaan Tokgoz, Mattia Frasca, Yasuharu Koike, Jacopo Iannacci, Natsue Yoshimura, Kazuya Masu, Hiroyuki Ito:
Distributed Sensing Via Inductively Coupled Single-Transistor Chaotic Oscillators: A New Approach and Its Experimental Proof-of-Concept. IEEE Access 8: 36536-36555 (2020) - 2019
- [j42]Ludovico Minati, Mattia Frasca, Natsue Yoshimura, Leonardo Ricci, Pawel Oswiecimka, Yasuharu Koike, Kazuya Masu, Hiroyuki Ito:
Current-Starved Cross-Coupled CMOS Inverter Rings as Versatile Generators of Chaotic and Neural-Like Dynamics Over Multiple Frequency Decades. IEEE Access 7: 54638-54657 (2019) - 2018
- [j41]Motohiro Takayasu, Shiro Dosho, Hiroyuki Ito, Daisuke Yamane, Toshifumi Konishi, Katsuyuki Machida, Noboru Ishihara, Kazuya Masu:
A 0.18-µm CMOS time-domain capacitive-sensor interface for sub-1mG MEMS accelerometers. IEICE Electron. Express 15(2): 20171227 (2018) - 2017
- [j40]Sho Ikeda, Hiroyuki Ito, Akifumi Kasamatsu, Yosuke Ishikawa, Takayoshi Obara, Naoki Noguchi, Koji Kamisuki, Yao Jiyang, Shinsuke Hara, Ruibing Dong, Shiro Dosho, Noboru Ishihara, Kazuya Masu:
A - 244-dB FOM High-Frequency Piezoelectric Resonator-Based Cascaded Fractional-N PLL With Sub-ppb-Order Channel-Adjusting Technique. IEEE J. Solid State Circuits 52(4): 1123-1133 (2017) - 2016
- [j39]Michihiro Shintani, Takumi Uezono, Kazumi Hatayama, Kazuya Masu, Takashi Sato:
Path Clustering for Test Pattern Reduction of Variation-Aware Adaptive Path Delay Testing. J. Electron. Test. 32(5): 601-609 (2016) - [j38]Daisuke Yamane, Toshifumi Konishi, Teruaki Safu, Hiroshi Toshiyoshi, Masato Sone, Kazuya Masu, Katsuyuki Machida:
Evaluation and modeling of adhesion layer in shock-protection structure for MEMS accelerometer. Microelectron. Reliab. 66: 78-84 (2016) - 2015
- [j37]Atsushi Shirane, Yiming Fang, Haowei Tan, Taiki Ibe, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
RF-Powered Transceiver With an Energy- and Spectral-Efficient IF-Based Quadrature Backscattering Transmitter. IEEE J. Solid State Circuits 50(12): 2975-2987 (2015) - 2014
- [j36]Koh Yamanaga, Shiho Hagiwara, Ryo Takahashi, Kazuya Masu, Takashi Sato:
State-Dependence of On-Chip Power Distribution Network Capacitance. IEICE Trans. Electron. 97-C(1): 77-84 (2014) - [j35]Shiho Hagiwara, Takanori Date, Kazuya Masu, Takashi Sato:
Hypersphere Sampling for Accelerating High-Dimension and Low-Failure Probability Circuit-Yield Analysis. IEICE Trans. Electron. 97-C(4): 280-288 (2014) - [j34]Sho Ikeda, Sang-yeop Lee, Tatsuya Kamimura, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A Sub-1mW Class-C-VCO-Based Low Voltage PLL with Ultra-Low-Power Digitally-Calibrated ILFD in 65nm CMOS. IEICE Trans. Electron. 97-C(6): 495-504 (2014) - [j33]Michihiro Shintani, Takumi Uezono, Tomoyuki Takahashi, Kazumi Hatayama, Takashi Aikyo, Kazuya Masu, Takashi Sato:
A Variability-Aware Adaptive Test Flow for Test Quality Improvement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(7): 1056-1066 (2014) - 2013
- [j32]Hamid Kiumarsi, Hiroyuki Ito, Kenichi Okada, Yusuke Uemichi, Yasuto Chiba, Noboru Ishihara, Kazuya Masu:
A 60GHz 3-dB tandem coupler using offset broadside-coupled lines on a silicon substrate. IEICE Electron. Express 10(2): 20120901 (2013) - 2012
- [j31]Kazuo Nakano, Shuhei Amakawa, Noboru Ishihara, Kazuya Masu:
RF signal generator using time domain harmonic suppression technique in 90nm CMOS. IEICE Electron. Express 9(4): 270-275 (2012) - [j30]Sang-yeop Lee, Hiroyuki Ito, Satoru Tanoi, Noboru Ishihara, Kazuya Masu:
Injection-locked fractional frequency multiplier with automatic reference pulse-selection technique. IEICE Electron. Express 9(21): 1624-1629 (2012) - [j29]Sang-yeop Lee, Norifumi Kanemaru, Sho Ikeda, Tatsuya Kamimura, Satoru Tanoi, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A Ring-VCO-Based Injection-Locked Frequency Multiplier with Novel Pulse Generation Technique in 65 nm CMOS. IEICE Trans. Electron. 95-C(10): 1589-1597 (2012) - 2011
- [j28]Noboru Ishihara, Shuhei Amakawa, Kazuya Masu:
RF CMOS Integrated Circuit: History, Current Status and Future Prospects. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(2): 556-567 (2011) - [j27]Yusaku Ito, Kenichi Okada, Kazuya Masu:
A Tunable Wideband Frequency Synthesizer Using LC-VCO and Mixer for Reconfigurable Radio Transceivers. J. Electr. Comput. Eng. 2011: 361910:1-361910:7 (2011) - 2010
- [j26]Toshiyuki Umeda, Kazuya Masu:
A study for the efficiency of transmission energy for different high-frequency communication circuits. IEICE Electron. Express 7(8): 552-557 (2010) - [j25]Mousa M. Othman, Shuhei Amakawa, Noboru Ishihara, Kazuya Masu:
Wide-band, high linear low noise amplifier design in 0.18um CMOS technology. IEICE Electron. Express 7(11): 759-764 (2010) - [j24]Takumi Uezono, Kazuya Masu, Takashi Sato:
A Time-Slicing Ring Oscillator for Capturing Time-Dependent Delay Degradation and Power Supply Voltage Fluctuation. IEICE Trans. Electron. 93-C(3): 324-331 (2010) - [j23]Koh Yamanaga, Shuhei Amakawa, Kazuya Masu, Takashi Sato:
A Universal Equivalent Circuit Model for Ceramic Capacitors. IEICE Trans. Electron. 93-C(3): 347-354 (2010) - [j22]Shiho Hagiwara, Koh Yamanaga, Ryo Takahashi, Kazuya Masu, Takashi Sato:
Linear Time Calculation of On-Chip Power Distribution Network Capacitance Considering State-Dependence. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(12): 2409-2416 (2010) - 2009
- [j21]Kazuya Masu, Noboru Ishihara, Noriaki Nakayama, Takashi Sato, Shuhei Amakawa:
Physical design challenges to nano-CMOS circuits. IEICE Electron. Express 6(11): 703-720 (2009) - [j20]Hirotaka Sugawara, Kenichi Okada, Kazuya Masu:
Tunable CMOS LNA Using a Variable Inductor for a Reconfigurable RF Circuit. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(2): 401-410 (2009) - [j19]Koh Yamanaga, Takashi Sato, Kazuya Masu:
2-Port Modeling Technique for Surface-Mount Passive Components Using Partial Inductance Concept. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(4): 976-982 (2009) - [j18]Takumi Uezono, Takashi Sato, Kazuya Masu:
One-Shot Voltage-Measurement Circuit Utilizing Process Variation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(4): 1024-1030 (2009) - [j17]Shiho Hagiwara, Takashi Sato, Kazuya Masu:
Analytical Estimation of Path-Delay Variation for Multi-Threshold CMOS Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(4): 1031-1038 (2009) - [j16]Takashi Sato, Hiroyuki Ueyama, Noriaki Nakayama, Kazuya Masu:
Accurate Array-Based Measurement for Subthreshold-Current of MOS Transistors. IEEE J. Solid State Circuits 44(11): 2977-2986 (2009) - [j15]Takeshi Ito, Kenichi Okada, Kazuya Masu:
Characterization of On-Chip Multiport Inductors for Small-Area RF Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(8): 1590-1597 (2009) - 2008
- [j14]Kazuya Masu, Kenichi Okada:
Reconfigurable RF CMOS Circuit for Cognitive Radio. IEICE Trans. Commun. 91-B(1): 10-13 (2008) - [j13]Shiho Hagiwara, Takumi Uezono, Takashi Sato, Kazuya Masu:
Application of Correlation-Based Regression Analysis for Improvement of Power Distribution Network. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(4): 951-956 (2008) - [j12]Masanori Imai, Takashi Sato, Noriaki Nakayama, Kazuya Masu:
An Evaluation Method of the Number of Monte Carlo STA Trials for Statistical Path Delay Analysis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(4): 957-964 (2008) - [j11]Kenta Yamada, Takashi Sato, Shuhei Amakawa, Noriaki Nakayama, Kazuya Masu, Shigetaka Kumashiro:
Layout-Aware Compact Model of MOSFET Characteristics Variations Induced by STI Stress. IEICE Trans. Electron. 91-C(7): 1142-1150 (2008) - [j10]Hiroyuki Ito, Makoto Kimura, Kazuya Miyashita, Takahiro Ishii, Kenichi Okada, Kazuya Masu:
A Bidirectional- and Multi-Drop-Transmission-Line Interconnect for Multipoint-to-Multipoint On-Chip Communications. IEEE J. Solid State Circuits 43(4): 1020-1029 (2008) - [j9]Tackya Yammouch, Kenichi Okada, Kazuya Masu:
Physical Modeling of MEMS Variable Inductor. IEEE Trans. Circuits Syst. II Express Briefs 55-II(5): 419-422 (2008) - 2007
- [j8]Hiroyuki Ito, Hideyuki Sugita, Kenichi Okada, Tatsuya Ito, Kazuhisa Itoi, Masakazu Sato, Ryozo Yamauchi, Kazuya Masu:
Low-Loss Distributed Constant Passive Devices Using Wafer-Level Chip Scale Package Technology. IEICE Trans. Electron. 90-C(3): 641-643 (2007) - 2006
- [j7]Kazuya Masu, Kenichi Okada, Hiroyuki Ito:
RF Passive Components Using Metal Line on Si CMOS. IEICE Trans. Electron. 89-C(6): 681-691 (2006) - [j6]Takumi Uezono, Kenichi Okada, Kazuya Masu:
Statistical Modeling of a Via Distribution for Yield Estimation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(12): 3579-3584 (2006) - 2005
- [j5]Yoshiaki Yoshihara, Hirotaka Sugawara, Hiroyuki Ito, Kenichi Okada, Kazuya Masu:
Wide Tuning Range LC-VCO Using Variable Inductor for Reconfigurable RF Circuit. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(2): 507-512 (2005) - [j4]Hidenari Nakashima, Junpei Inoue, Kenichi Okada, Kazuya Masu:
Circuit Performance Prediction Considering Core Utilization with Interconnect Length Distribution Model. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(12): 3358-3366 (2005) - [j3]Hidenari Nakashima, Naohiro Takagi, Junpei Inoue, Kenichi Okada, Kazuya Masu:
Evaluation of X Architecture Using Interconnect Length Distribution. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(12): 3437-3444 (2005) - [j2]Takanori Kyogoku, Junpei Inoue, Hidenari Nakashima, Takumi Uezono, Kenichi Okada, Kazuya Masu:
Wire Length Distribution Model for System LSI. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(12): 3445-3452 (2005) - 2004
- [j1]Yoshiaki Yoshihara, Hirotaka Sugawara, Hiroyuki Ito, Kenichi Okada, Kazuya Masu:
Inductance-Tuned LC-VCO for Reconfigurable RF Circuit Design. IEICE Electron. Express 1(7): 156-159 (2004)
Conference and Workshop Papers
- 2021
- [c61]Kohei Shibata, Akihiro Uchiyama, Akira Onishi, Shinichi Iida, Toshifumi Konishi, Noboru Ishihara, Katsuyuki Machida, Kazuya Masu, Hiroyuki Ito:
A Simplified Analytical Damping Constant Model for Perforated Proof Mass Structure of MEMS Capacitive Accelerometer by Multi-Layer Metal Technology. IEEE SENSORS 2021: 1-4 - 2019
- [c60]Tatsuya Koga, Katsuyuki Machida, Yoshihiro Miyake, Kazuya Masu, Takashi Ichikawa, Naoto Tanaka, Taiki Ogata, Hiroki Ora, Daisuke Yamane, Noboru Ishihara, Hiroyuki Ito, Masato Sone:
High-Sensitivity Inertial Sensor Module to Measure Hidden Micro Muscular Sounds. BioCAS 2019: 1-4 - [c59]Kyotaro Nitta, Masato Sone, Haochun Tang, Chun-Yi Chen, Tso-Fu Mark Chang, Daisuke Yamane, Shinichi Iida, Katsuyuki Machida, Hiroyuki Ito, Kazuya Masu:
Fabrication of Au-Cu Alloy/Ti Layered Micro-Cantilevers and the Long-Term Structure Stability. IEEE SENSORS 2019: 1-4 - 2017
- [c58]Yosuke Ishikawa, Sho Ikeda, Hiroyuki Ito, Akifumi Kasamatsu, Takayoshi Obara, Naoki Noguchi, Koji Kamisuki, Yao Jiyang, Shinsuke Hara, Ruibing Dong, Shiro Dosho, Noboru Ishihara, Kazuya Masu:
Design of high-frequency piezoelectric resonator-based cascaded fractional-N PLL with sub-ppb-order channel adjusting technique. ASP-DAC 2017: 43-44 - [c57]Yuta Oshima, Iwao Mizumoto, Hiroshi Oguma, Noboru Ishihara, Kazuya Masu:
Estimation of energy self-sufficiency rate by EMS simulation using SPICE. ICTC 2017: 72-75 - [c56]Hideaki Nakajima, Tso-Fu Mark Chang, Chun-Yi Chen, Toshifumi Konishi, Katsuyuki Machida, Hiroshi Toshiyoshi, Daisuke Yamane, Kazuya Masu, Masato Sone:
A study on young's modulus of electroplated gold cantilevers for MEMS devices. NEMS 2017: 264-267 - 2016
- [c55]Kazuya Masu, Daisuke Yamane, Katsuyuki Machida, Masato Sone, Yoshihiro Miyake:
Development of high sensitivity CMOS-MEMS inertia sensor and its application to early-stage diagnosis of Parkinson's disease. ESSCIRC 2016: 99-104 - [c54]Yuta Oshima, Hiroshi Oguma, Noboru Ishihara, Kazuya Masu:
Simulation and evaluation of PV power generation for energy management system using SPICE. ICTC 2016: 74-77 - [c53]Toshifumi Konishi, Teruaki Safu, Katsuyuki Machida, Daisuke Yamane, Masato Sone, Kazuya Masu, Hiroshi Toshiyoshi:
A damping constant model for proof-mass structure design of MEMS inertial sensor by multi-layer metal technology. IEEE SENSORS 2016: 1-3 - [c52]Daisuke Yamane, Toshifumi Konishi, Teruaki Safu, Hiroshi Toshiyoshi, Masato Sone, Kazuya Masu, Katsuyuki Machida:
A design of spring constant arranged for MEMS accelerometer by multi-layer metal technology. NEMS 2016: 419-422 - [c51]Kohei Ohba, Yoshihiro Yoneda, Koji Kurihara, Takashi Suganuma, Hiroyuki Ito, Noboru Ishihara, Kunihiko Gotoh, Koichiro Yamashita, Kazuya Masu:
Environmental Data Recovery using Polynomial Regression for Large-scale Wireless Sensor Networks. SENSORNETS 2016: 161-168 - [c50]Sho Ikeda, Hiroyuki Ito, Akifumi Kasamatsu, Yosuke Ishikawa, Takayoshi Obara, Naoki Noguchi, Koji Kamisuki, Yao Jiyang, Shinsuke Hara, Ruibing Dong, Shiro Dosho, Noboru Ishihara, Kazuya Masu:
An 8.865-GHz -244dB-FOM high-frequency piezoelectric resonator-based cascaded fractional-N PLL with sub-ppb-order channel adjusting technique. VLSI Circuits 2016: 1-2 - 2015
- [c49]Sho Ikeda, Sang-yeop Lee, Shin Yonezawa, Yiming Fang, Motohiro Takayasu, Taisuke Hamada, Yosuke Ishikawa, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A 0.5-V 5.8-GHz low-power asymmetrical QPSK/OOK transceiver for wireless sensor network. ASP-DAC 2015: 40-41 - [c48]Yosuke Ishikawa, Sang-yeop Lee, Shin Yonezawa, Sho Ikeda, Yiming Fang, Taisuke Hamada, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A 0.5-V 1.56-mW 5.5-GHz RF transceiver IC module with J-shaped folded monopole antenna. ISCAS 2015: 1218-1221 - [c47]Atsushi Shirane, Haowei Tan, Yiming Fang, Taiki Ibe, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
13.8 A 5.8GHz RF-powered transceiver with a 113μW 32-QAM transmitter employing the IF-based quadrature backscattering technique. ISSCC 2015: 1-3 - 2014
- [c46]Taisuke Hamada, Hao Jiang, Yiming Fang, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A 0.5-V 2.5-GHz high-gain low-power regenerative amplifier based on Colpitts oscillator topology in 65-nm CMOS. APCCAS 2014: 340-343 - [c45]Sho Ikeda, Tatsuya Kamimura, Sang-yeop Lee, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A 950μW 5.5-GHz low voltage PLL with digitally-calibrated ILFD and linearized varactor. ASP-DAC 2014: 23-24 - [c44]Hiroyuki Ito, Yoshihiro Yoneda, Taiki Ibe, Taisuke Hamada, Noboru Ishihara, Kazuya Masu, Shoichi Masui, Youichi Momiyama:
An ultra-low-power RF transceiver with a 1.5-pJ/bit maximally-digital impulse-transmitter and an 89.5-μW super-regenerative RSSI. A-SSCC 2014: 265-268 - [c43]Sho Ikeda, Sang-yeop Lee, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A 0.52-V 5.7-GHz low noise sub-sampling PLL with dynamic threshold MOSFET. A-SSCC 2014: 365-368 - [c42]Yusuke Shiino, Hiroyuki Ito, Taku Fujiwara, Noboru Ishihara, Hisashi Yamanouchi, Hiroki Tanabe, Satoshi Nomura, Toshifumi Konishi, Katsuyuki Machida, Kazuya Masu:
An ultra low power pH-monitoring IC with a duty-cycling wireless FM-transmitter. ISCAS 2014: 882-885 - 2013
- [c41]Kazuya Masu, Noboru Ishihara, Toshifumi Konishi, Katsuyuki Machida, Hiroshi Toshiyoshi:
Challenges in integration of diverse functionalities on CMOS. ASP-DAC 2013: 390-393 - [c40]Hiroshi Toshiyoshi, Toshifumi Konishi, Katsuyuki Machida, Kazuya Masu:
A mixed-design technique for integrated MEMS using a circuit simulator with HDL. MIXDES 2013: 17-22 - [c39]Atsushi Shirane, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A process-scalable RF transmitter using 90nm and 65nm Si CMOS. VLSI-DAT 2013: 1-4 - 2012
- [c38]Sho Ikeda, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
Optimal design method for chip-area-efficient CMOS low-dropout regulator. APCCAS 2012: 332-335 - 2011
- [c37]Atsushi Shirane, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A 21 V output charge pump circuit with appropriate well-bias supply technique in 0.18 μm Si CMOS. ISOCC 2011: 28-31 - [c36]Norifumi Kanemaru, Sho Ikeda, Tatsuya Kamimura, Sang-yeop Lee, Satoru Tanoi, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A ring-VCO-based injection-locked frequency multiplier using a new pulse generation technique in 65 nm CMOS. ISOCC 2011: 32-35 - 2010
- [c35]Takashi Sato, Takumi Uezono, Noriaki Nakayama, Kazuya Masu:
Decomposition of drain-current variation into gain-factor and threshold voltage variations. ISCAS 2010: 1053-1056 - [c34]Takumi Uezono, Tomoyuki Takahashi, Michihiro Shintani, Kazumi Hatayama, Kazuya Masu, Hiroyuki Ochi, Takashi Sato:
Scan based process parameter estimation through path-delay inequalities. ISCAS 2010: 3553-3556 - [c33]Takanori Date, Shiho Hagiwara, Kazuya Masu, Takashi Sato:
Robust importance sampling for efficient SRAM yield analysis. ISQED 2010: 15-21 - [c32]Shiho Hagiwara, Koh Yamanaga, Ryo Takahashi, Kazuya Masu, Takashi Sato:
Linear time calculation of state-dependent power distribution network capacitance. ISQED 2010: 75-80 - [c31]Koh Yamanaga, Kazuya Masu, Takashi Sato:
Application of generalized scattering matrix for prediction of power supply noise. SLIP 2010: 83-90 - [c30]Takumi Uezono, Tomoyuki Takahashi, Michihiro Shintani, Kazumi Hatayama, Kazuya Masu, Hiroyuki Ochi, Takashi Sato:
Path clustering for adaptive test. VTS 2010: 15-20 - 2009
- [c29]Michihiro Shintani, Takumi Uezono, Tomoyuki Takahashi, Hiroyuki Ueyama, Takashi Sato, Kazumi Hatayama, Takashi Aikyo, Kazuya Masu:
An Adaptive Test for Parametric Faults Based on Statistical Timing Information. Asian Test Symposium 2009: 151-156 - [c28]Tomoaki Maekawa, Shuhei Amakawa, Noboru Ishihara, Kazuya Masu:
Design of CMOS inverter-based output buffers adapting the cherry-hooper broadbanding technique. ECCTD 2009: 511-514 - [c27]Yuka Kobayashi, Shuhei Amakawa, Noboru Ishihara, Kazuya Masu:
A low-phase-noise injection-locked differential ring-VCO with half-integral subharmonic locking in 0.18 µm CMOS. ESSCIRC 2009: 440-443 - 2008
- [c26]Akiko Mineyama, Hiroyuki Ito, Takahiro Ishii, Kenichi Okada, Kazuya Masu:
LVDS-type on-chip transmision line interconnect with passive equalizers in 90nm CMOS process. ASP-DAC 2008: 97-98 - [c25]Susumu Sadoshima, Satoshi Fukuda, Tackya Yammouch, Hiroyuki Ito, Kenichi Okada, Kazuya Masu:
Small-area CMOS RF distributed mixer using multi-port inductors. ASP-DAC 2008: 105-106 - [c24]Takashi Sato, Hiroyuki Ueyama, Noriaki Nakayama, Kazuya Masu:
Determination of optimal polynomial regression function to decompose on-die systematic and random variations. ASP-DAC 2008: 518-523 - [c23]Masanori Imai, Takashi Sato, Noriaki Nakayama, Kazuya Masu:
Non-parametric statistical static timing analysis: an SSTA framework for arbitrary distribution. DAC 2008: 698-701 - [c22]Hiroyuki Ito, Hasnain Lakdawala, Ashoke Ravi, Stefano Pellerano, Rick Ruby, Krishnamurthy Soumyanath, Kazuya Masu:
A 1.7-GHz 1.5-mW digitally-controlled FBAR oscillator with 0.03-ppb resolution. ESSCIRC 2008: 98-101 - [c21]Tomoaki Maekawa, Hiroyuki Ito, Kazuya Masu:
An 8Gbps 2.5mW on-chip pulsed-current-mode transmission line interconnect with a stacked-switch Tx. ESSCIRC 2008: 474-477 - 2007
- [c20]Kazuma Ohashi, Yusaku Ito, Yoshiaki Yoshihara, Kenichi Okada, Kazuya Masu:
A Wideband CMOS LC-VCO Using Variable Inductor. ASP-DAC 2007: 98-99 - [c19]Satoshi Fukuda, D. Kawazoe, Kenichi Okada, Kazuya Masu:
Reconfigurable CMOS Low Noise Amplifier Using Variable Bias Circuit for Self Compensation. ASP-DAC 2007: 104-105 - [c18]Junki Seita, Hiroyuki Ito, Kenichi Okada, Takashi Sato, Kazuya Masu:
A Multi-Drop Transmission-Line Interconnect in Si LSI. ASP-DAC 2007: 118-119 - [c17]Shiho Hagiwara, Takumi Uezono, Takashi Sato, Kazuya Masu:
Improvement of power distribution network using correlation-based regression analysis. ACM Great Lakes Symposium on VLSI 2007: 513-516 - [c16]Takashi Sato, Takumi Uezono, Shiho Hagiwara, Kenichi Okada, Shuhei Amakawa, Noriaki Nakayama, Kazuya Masu:
A MOS Transistor-Array for Accurate Measurement of Subthreshold Leakage Variation. ISQED 2007: 21-26 - [c15]Takashi Sato, Shiho Hagiwara, Takumi Uezono, Kazuya Masu:
Weakness Identification for Effective Repair of Power Distribution Network. PATMOS 2007: 222-231 - [c14]Shuhei Amakawa, Takumi Uezono, Takashi Sato, Kenichi Okada, Kazuya Masu:
Adaptable wire-length distribution with tunable occupation probability. SLIP 2007: 1-8 - 2006
- [c13]D. Kawazoe, Hirotaka Sugawara, Tatsuya Ito, Kenichi Okada, Kazuya Masu:
Reconfigurable CMOS low noise amplifier for self compensation. ISCAS 2006 - [c12]Takumi Uezono, Kenichi Okada, Kazuya Masu:
Via Distribution Model for Yield Estimation. ISQED 2006: 479-484 - [c11]Kenichi Okada, Takumi Uezono, Kazuya Masu:
Estimation of Power Reduction by On-Chip Transmission Line for 45nm Technology. PATMOS 2006: 181-190 - 2005
- [c10]Junpei Inoue, Hiroyuki Ito, Shinichiro Gomi, Takanori Kyogoku, Takumi Uezono, Kenichi Okada, Kazuya Masu:
Evaluation of on-chip transmission line interconnect using wire length distribution. ASP-DAC 2005: 133-138 - [c9]Kenichi Okada, Yoshiaki Yoshihara, Hirotaka Sugawara, Kazuya Masu:
A dynamic reconfigurable RF circuit architecture. ASP-DAC 2005: 683-686 - [c8]Takanori Kyogoku, Junpei Inoue, Hidenari Nakashima, Takumi Uezono, Kenichi Okada, Kazuya Masu:
Wire Length Distribution Model Considering Core Utilization for System on Chip. ISVLSI 2005: 276-277 - [c7]Takumi Uezono, Junpei Inoue, Takanori Kyogoku, Kenichi Okada, Kazuya Masu:
Prediction of delay time for future LSI using on-chip transmission line interconnects. SLIP 2005: 7-12 - 2004
- [c6]Shinichiro Gomi, Kohichi Nakamura, Hiroyuki Ito, Kenichi Okada, Kazuya Masu:
Differential transmission line interconnect for high speed and low power global wiring. CICC 2004: 325-328 - [c5]Hidenari Nakashima, Junpei Inoue, Kenichi Okada, Kazuya Masu:
ULSI Interconnect Length Distribution Model Considering Core Utilization. DATE 2004: 1210-1217 - [c4]Shinichiro Gomi, Kohichi Nakamura, Hiroyuki Ito, Hideyuki Sugita, Kenichi Okada, Kazuya Masu:
High speed and low power on-chip micro network circuit with differential transmission line. SoC 2004: 173-176 - 2000
- [c3]Suguru Kameda, Kouichi Takahashi, Taketo Kamata, Jae Sang Cha, Hiroyuki Nakase, Kazuya Masu, Kazuo Tsubouchi:
Design and implementation of intracell reverse link using approximately synchronized CDMA. PIMRC 2000: 256-260 - [c2]Hiroyuki Nakase, Koji Kubota, Suguru Kameda, Kenji Togura, Kazuya Masu, Kazuo Tsubouchi:
Implementation of low power matched filter LSI for IMT-2000. PIMRC 2000: 964-968 - 1994
- [c1]Hiroyuki Nakase, T. Kasai, Y. Nakamura, Kazuya Masu, Kazuo Tsubouchi:
One chip demodulator using RF front-end SAW correlator for 2.4 GHz asynchronous spread spectrum modem. PIMRC 1994: 374-378
Coauthor Index
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Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from , , and to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
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last updated on 2024-06-18 20:28 CEST by the dblp team
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