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ORCID14th ASICON 2021: Kunming, China
- Fan Ye, Ting-Ao Tang:
14th IEEE International Conference on ASIC, ASICON 2021, Kunming, China, October 26-29, 2021. IEEE 2021, ISBN 978-1-6654-3867-4 - Wei Liu, Gang Liu, Bing He, Jie Zhang, Hanlin Qin, Shuai Yuan:
Development of MEMS Capacitive Mirror Structure with CMOS Compatible Process. 1-3 - Junkai Zhang, Zunkai Huang, Quanze Li, Xinyao Zhang, Li Tian, Yongxin Zhu, Hui Wang, Songlin Feng:
A High-Efficiency Charge Pump for AMOLED Display Driver IC. 1-4 - Toshiro Hiramoto, Takuya Saraya:
Recent Progress of Double/Dual-Gate Silicon IGBT Technologies. 1-4 - Moufu Kong, Zewei Hu, Jiacheng Gao, Zongqi Chen, Jiaxin Guo, Sadaf Ali Nafees, Bo Yi, Hongqiang Yang:
A New Ga2O3 Trench Schottky Barrier Diode with Improved Forward Conduction Characteristics. 1-4 - Jian Liu, Ke Wang
, Xiaolong Zhou, Xiaopeng Xiao, Yongming Tang, Zhongyuan Ma, Kunji Chen:
Resistive Switching Characteristics of HfOx/Al2O3 Nano-multilayers Structure Memristor Fabricated by Atomic Layer Deposition. 1-3 - Xinyao Zhang, Zunkai Huang, Yingqi Feng, Junkai Zhang, Li Tian, Yongxin Zhu, Hui Wang, Songlin Feng:
A 6-bit, 1GS/s Digital to Analog Converter for Automotive Ethernet PHY. 1-4 - Aoxiang Qin, Minghua Shen, Nong Xiao:
A Practical High-Level Synthesis Framework. 1-4 - Zhiwang Guo, Deyang Chen, Xiaoyong Xue:
Algorithm/Hardware Co-Design Configurable SAR ADC with Low Power for Computing-in-Memory in 28nm CMOS. 1-4 - Zheng Wu, Chao Xia, Bo Yi, Junji Cheng, Haimeng Huang, Moufu Kong, Hongqiang Yang, Wenkun Shi:
A split-gate SiC trench MOSFET with embedded unipolar diode for improved performances. 1-4 - Haihua Wang, Song He, Kai Xiao, Yu-Long Jiang, Jing Wan:
Impact of Evaporated AuNP Thickness on Pseudo-MOS and Its Application in Direct MicroRNA-375 Detection. 1-3 - Hang Xu, Dong-Hui Zhao, Hao Zhu, Qing-Qing Sun, David Wei Zhang:
A process optimization method for carrier stored trench bipolar transistor (CSTBT) device. 1-4 - Haoran Wang, Fule Li:
A 12-bit 800MS/s pipelined A/D converter. 1-4 - Gokul Krishnan, Sumit K. Mandal, Chaitali Chakrabarti, Jae-Sun Seo, Ümit Y. Ogras, Yu Cao:
System-Level Benchmarking of Chiplet-based IMC Architectures for Deep Neural Network Acceleration. 1-4 - Yang Li, Yuejun Zhang, Steve Yang, Shimin Du, Ye Lin:
A String-in-string-out 256 Bits eFuse Using Full-custom Design in 55nm Process. 1-4 - Xi Chen, Qian-cheng Guo, Hengzhou Yuan, Zhenyu Wu, Yang Guo:
Analysis of Single Events Effects on Supply-Regulated LC-Tank Voltage-Controlled Oscillator. 1-4 - Xiong Li, Huangxia Zhu, Xiaolin Guo, Kejun Mu, Peng Feng, Qi-An Xu, Blacksmith Wu, Kanyu Cao:
Impact of Hydrogen Anneal on Peripheral PMOS NBTI and Array Transistor GIDL in DRAM. 1-4 - Shuai Liu, Rui Yin, Hao Xu, Xiaoliang Shen, Na Yan:
An 800MS/s, 6.7b ENOB Bootstrap Switching S/H IC for Wideband Direct RF Sub-Sampling Receiver in 45 nm CMOS. 1-4 - Ruoyu Zhang, Ming-e Jing, Yibo Fan, Xiaoyang Zeng:
Small Object Detection in Aerial Images. 1-4 - Qingyun Zou, Xiaoxin Cui, Yi Zhong, Zhenhui Dai, Yisong Kuang:
A fully asynchronous QDI mesh router based on 28nm standard cells. 1-4 - Jia-Le Cui, Hai-Bin Wang, Hao Cai:
A Self-regulating Dynamic Reference Sensing Scheme with Balanced Trade-Off between Read Disturbance and Sensing Margin. 1-4 - Yang Jiang, Fangzhou Du, Zepeng Qiao, Wei-Chih Cheng, Jiaqi He, Xinyi Tang, Feifei Liu, Lei Wen, Qing Wang, Hongyu Yu:
InAlN/GaN HEMTs on Si with 0.18-Ω•mm Contact Resistance and 2.1-A/mm Drain Current Density. 1-4 - Minoru Fujishima:
A 300GHz CMOS Transceiver Targeting 6G. 1-4 - Peng Feng, Liyuan Liu, Nanjian Wu:
Pixel Design of Ultra-high Speed CMOS Image Sensor. 1-4 - Jianglin Wei, Anna Kuwana, Haruo Kobayashi, Kazuyoshi Kubo:
Divide and Conquer: Floating-Point Exponential Calculation Based on Taylor-Series Expansion. 1-4 - Bohan Feng, Xi Cheng, Jingjing Liu, Mingyu Wang, Wenhong Li, Zheng Zhou:
An Efficient Space Spatiotemporal Noise Filter for Dynamic Vision Sensor. 1-4 - Geng Zhang, Fangxu Lv, Zhengbin Pang, Heming Wang, Dongbin Lv, Tao Liu, Jinwang Zhang:
A 5-156.25Gb/s high pin efficiency Receiver Based on CNRZ-5 for USR High-Speed Interface. 1-4 - Zekun Zhou, Jianwen Cao, Bo Zhang:
Design Techniques of Gate Driver for SiC MOSFET's Applications. 1-4 - Francis Balestra:
Status and trends in Nanoelectronic devices for the ultimate integration of ICs. 1-4 - Wei Zhang, Yunlin Liu, Zhibo Chen, Yating Zou, Yizhou Jiang, Ye Lu, Yajie Qin:
16-Channel Readout Circuit for Nucleic Acid Detection Based on Graphene Electrolyte-gated Field-effect Transistors (EGFETs). 1-4 - Yiliang Guo, Mingjun Jiang, Feng Dong, Kehua Yu, Ke Chen, Wei Qu, Jianfei Jiang:
A CPU-FPGA Based Heterogeneous Accelerator for RepVGG. 1-4 - Chenyue Shi, Shengyuan Zhou, Jing Jin:
An Enhanced SSCP for Frequency Drift Suppressing in SSPLL. 1-4 - Min Hu, Weidan Li, Mingmin Huang, Chang Chen, Min Gong:
Semi-superjunction IGBT with floating p-pillar and p-ring for low losses and high breakdown voltage. 1-4 - Mehzabeen Mehedi, Kean Hong Tok, Jian Fu Zhang, Zhigang Ji, Zengliang Ye, Weidong Zhang, John S. Marsland:
An integrated method for extracting the statistical distribution of RTN time constants. 1-4 - Weiqi Zhi, Ting Yi, Zhiliang Hong:
A Review and Perspective on Electrode Patch-Based Fetal ECG Monitoring ASIC. 1-4 - Dawei Wang, Tao Liu, Xin Sun, Kun Chen, Jingwen Yang, Chunlei Wu, Min Xu, David Wei Zhang:
Channel Stress Engineering Through Source/Drain Recess Optimization and Its Process Variation Study for 5 nm-node FinFETs. 1-4 - Yukai Lin, Yu Wang, Xianwu Hu, Jiayun Feng, Gan Wen, Xiankui Xiong, Haidong Tian, Yufeng Xie:
A Semi-Floating Gate Transistors In-Memory Computing design with 40.14 TOPS/W for matrix-multiplication with frequently updated weight. 1-4 - Xiaoqing Zhao, Longjun Liu, Liang Si, Keyang Pan, Hongbin Sun, Nanning Zheng:
Adaptive Weight Mapping Strategy to Address the Parasitic Effects for ReRAM-based Neural Networks. 1-4 - Jiankun Huang, Xinjie Feng, Congying Zhou, Yongzhen Chen:
A High-Performance Mel-scale Frequency Cepstral Coefficients Digital Circuit Used on Keyword-Spotting Chip. 1-4 - Sheng Dai, Yuejun Zhang, Huihong Zhang, Jing Li, Ye Lin:
A ReRAM-based 10T2R SRAM Using Power-off Recovery Function for Reducing Power. 1-4 - Zhixin Wu, Yuejun Zhang, Shimin Du, Zhecheng Guo, Wanlong Zhao:
A Three-valued Adder Circuit Implemented in ZnO Memristor with Multi-resistance States. 1-3 - Chang Wu, Jundong Xie, Kexin Wang:
Highly Efficient Modulo Loop Pipeline For High Level Synthesis. 1-4 - Rui Li, Mingmin Huang, Xi Zhang, Min Hu, Zhimei Yang, Yao Ma, Min Gong:
Superjunction MOSFET with Trench Schottky Contact and Embedded High-k Insulator for Excellent Reverse Recovery. 1-4 - Ziwei Li, Yutong Zhao, Guoyao Wu, Fan Ye, Junyan Ren:
A Wide-Range 12b 150MS/s P-SAR ADC with Open-Loop Residue Amplifier for Ultrasound AFE. 1-4 - Tingting Wei, Qiong Wang, Zhu Yuan, Zhiliang Hong:
A Low Power Real-Time DC Removal Circuit for PPG Readout. 1-3 - Ruijie Yan, Lihan Cui, Zhiliang Hong:
A Fourth Order Chebyshev Complex Band-pass Filter Design with Filter Solution. 1-4 - Miao Sun, Yingjie Cao, Patrick Yin Chiang:
Energy-aware Retinaface: A Power Efficient Edge-Computing SOC for Face Detector in 40nm. 1-4 - Jintao Zu, Xinpeng Xing, Haigang Feng:
A Charge Pump with Perfect Current Matching Applied to Phase-Locked Loop in 65nm CMOS. 1-4 - Sen Yin, Wenfei Hu, Wenyuan Zhang, Ruitao Wang, Jian Zhang, Yan Wang:
An efficient optimization method of RF passive components using RBF model. 1-4 - Chenyang Zhao, Jinbei Fang, Jingwen Jiang, Zhiwang Guo, Xiaoyong Xue, Xiaoyang Zeng:
Intra-array Non-Idealities Modeling and Algorithm Optimization for RRAM-based Computing-in-Memory Applications. 1-4 - Jing Li, Yulin Zhao, Bo Peng, Xuanzhi Liu, Qiao Hu, Sheng Dai, Jianguo Yang, Yuejun Zhang:
A HfO2 Ferroelectric Capacitor based 10T2C High Reliability Non-Volatile SRAM for Low Power IoT Applications. 1-4 - Yuan Ren, Rui Lin, Jie Ran, Chang Liu, Chaofan Tao, Zhongrui Wang, Can Li, Ngai Wong:
BATMANN: A Binarized-All-Through Memory-Augmented Neural Network for Efficient In-Memory Computing. 1-4 - Siau Ben Chiah, Xing Zhou, Kenneth Eng-Kian Lee:
Enabling Monolithic Heterogeneously Integrated Si/III-V Technology Platform. 1-4 - Yanwu Du, Chris Eom, Jake Jung, Brian Lee, Edwin Kim, Kanyu Cao:
Adaptive OCD and ODT Control for Channel S/I Enhancement in DDR4 SDRAM. 1-3 - Yue Shi, Zuao Wang, Zekun Zhou, Zhuo Wang, Bo Zhang:
A Segmented and Linear Frequency Controller for Flyback Converters. 1-4 - Kewei Xin, Bing Li, Haiyang Ding, Lei Bao, Haipeng Li:
Modeling and analysis of injection factor based on injection-locked LC oscillator. 1-4 - Jiyuan Bai, Xiang Wang, Zikang Zhang, Chang Cai, Gengsheng Chen:
A Hierarchical Fault Injection System for RISC-V Processors Targeting Single Event Upsets in Flip-Flops. 1-4 - Sanlin Chen, Gang Cai, Zhihong Huang:
An Enhanced DSP Block Architecture for FPGA Supporting Multi-operands Addition Operation. 1-4 - Jinrong Li, Jue Wang, Xu Cheng, Yicheng Zeng, Xiaoyang Zeng:
A 0.9V Supply 12.5Gb/s LVDS Receiver in 28nm CMOS Process. 1-4 - Hongyu Lu, Yinshui Xia:
A Cold-Start SECE and BUCK-SECE Hybrid Rectifier for Piezoelectric Energy Harvester. 1-3 - Hui Zhang, Zhaojie Li, Heqing Yang, Xu Cheng, Xiaoyang Zeng:
A High-Efficient and Configurable Hardware Accelerator for Convolutional Neural Network. 1-4 - Hailiang Xiong, Bingqing Zhao, Rui Yang, Zeya Xie, Shaowei Zhen, Dongmin Ding, Bo Zhang:
A Dual Path Hybrid Step-Up Converter with Enhanced Drive Voltage for Low Voltage Applications. 1-4 - Xiaofeng Hong, Hao Cai:
A Novel Hybrid Nonvolatile SRAM for Suppressing Leakage Power Using Tunnel FET. 1-4 - Shun-Qi Dai, Cristine Jin Estrada, An-Nan Xiong, Chen Xu, George Jie Yuan, Mansun Chan:
CMOS-Compatible Time-of-Flight 3D Imaging Sensors and Systems. 1-4 - Limo Guo, PengXu Lin, Lei Guo, Bo Liu:
Implementation of a CRNN-based low-power keyword recognition system on FPGA. 1-4 - Renyuan Zhang, Xuetao Wang, Ziyu Wang, Anfeng Xue, Haichuan Yang, Yu Gong, Bo Liu:
Mutual Error Compensation based Area and Power efficient Approximate Multiplier. 1-4 - Jiaxing Zuo, Jing Wan:
Novel Photodetectors and Image Sensors based on SOI Substrate. 1-3 - Yi Shen, Ziqian Li, Ang Li, Wen Liu:
Monolithically Integrated PWM Circuit Based on AlGaN/GaN MIS-HMETs for All-GaN Smart Power System. 1-4 - Wentao Tang, Xudong Yang, Yi Zhao:
Combined-solvent engineering of HPbI3 for efficient FAPbI3 perovskite solar cells. 1-4 - Anna Kuwana, Jun-Ichi Matsuda, Haruo Kobayashi:
Analysis of Switching Characteristics of Wide SOA and High Reliability 100 V N-LDMOS Transistor with Dual RESURF and Grounded Field Plate Structure. 1-4 - Xuejie Zhang, Zhidi Jiang, Jianping Hu:
A Novel Tri-input Schottky Barrier FET Exhibiting Three-Input Series Switching Function. 1-4 - Yutong Zhang, Rui Yin, Xiaoliang Shen, Na Yan, Ghazanfar Ali Safdar, Masood Ur Rehman:
A 60 GHz Broadband Wearable Antenna for Body-to-Body Communications. 1-4 - Yingxin Chen, Kai Xiao, Haihua Wang, Jing Wan:
The Impact of Incident Wavelength and Incident Intensity on Light-modulated Subthreshold Swing Effect. 1-4 - Haruo Kobayashi, Xueyan Bai, Yujie Zhao, Shuhei Yamamoto, Dan Yao, Manato Hirai, Jianglin Wei, Shogo Katayama, Anna Kuwana:
Classical Mathematics and Analog/Mixed-Signal IC Design. 1-4 - RiMing Jia, Tu Xu, Yuchun Chang:
Scalable Systolic Array Multiplier Optimized by Sparse Matrix. 1-4 - Shijie Hu, Gaoming Du, Jiashen Li, Zhenmin Li, Wei Ni, Yongsheng Yin, Xiaolei Wang:
Optimization of Node-clustering-based DAG partition targeting NVDLA Architecture. 1-4 - Di Gao, Lianxi Liu:
A Two-Stage Time-Division Multiplexing AFE with Input Impedance Boosting DDA for EEG Signal Acquisition. 1-4 - Chun Zhao, Tian Shi Zhao, Zong Jie Shen, Yixin Cao, Yina Liu, Li Yang, Ivona Z. Mitrovic, Eng Gee Lim, Ce Zhou Zhao:
Research on Two-dimensional MXenes Based Synaptic Devices for the Future In-memory Computing. 1-4 - Tien Van Nguyen, Jiyong An, Seokjin Oh:
Training, Programming, and Correction Techniques of Memristor-Crossbar Neural Networks with Non-Ideal Effects such as Defects, Variation, and Parasitic Resistance. 1-4 - Xinsheng Wang, Chunyang Bai:
Design of a Bandgap Reference Circuit with Ultra-low Temperature Coefficient. 1-4 - Xin Wang, Heming Sun, Jiro Katto, Yibo Fan:
A Hardware Architecture for Adaptive Loop Filter in VVC Decoder. 1-4 - Xi Wang, Junyan Ren, Shunli Ma:
An 4th-order N-path Bandpass Filter with a Tuning Range of 1-30 GHz and OOB Rejection > 30 dB in 28 nm CMOS. 1-4 - Chengzhi Xu, Lianxi Liu:
A Four Modes and Smooth Transition Non-inverting Buck-Boost Converter. 1-4 - Ai He, Weixin Gai, Kai Sheng, Ninghuang Li:
An Adaptive DFE Using Pattern-Dependent Data-Level Reference in 28 nm CMOS Technology. 1-4 - Yizhou Jiang, Han Jin, Chenjie Dong, Yajie Qin:
A 5.75nARMS Resolution Sigma-Delta-based Sinusoidal Current Generator for in-situ Calibration of Electrochemical Bio-sensors. 1-4 - Zhiyuan Wang, Zhuo Zhang, Haowen Chen:
A Streaming Feature Extraction Accelerator using DPCM Image Compression Technique for SLAM Applications. 1-4 - Yinchuan Gu, Chris Eom, Jake Jung, Brian Lee, Edwin Kim, Kanyu Cao:
A 2-stage with 3-stack 1-tap DFE Sense Amplifier based on Dual Reference for High Speed & Low Power DRAM Interface. 1-4 - Chuanhe Shang, Zhufei Chu:
Design of Majority Logic Based 4-bit Approximate Subtractors and its Application in Divider. 1-4 - Yingqi Li, Fan Yang, Changhao Yan, Xuan Zeng:
Efficient High-Level Synthesis of Approximate Computing Circuits via Multi-fidelity Modeling. 1-4 - Shanzhe Yu, Yacong Zhang, Fei Zhou, Wengao Lu, Shuyu Lei, Zhongjian Chen:
A CMOS Time-of-Flight Image Sensor with High Dynamic Range Digital Pixel. 1-4 - Peng Wang, En-xia Zhang, Daniel M. Fleetwood, Peng Fei Wang, Michael W. McCurdy, Ji-Tzouh Lin, Michael L. Alles, Jim L. Davidson, Bruce W. Alphenaar, Ronald D. Schrimpf:
Effects of Charge Generation and Trapping on the X-ray Response of Strained AlGaN/GaN HEMTs. 1-4 - Sujuan Liu, Chengkai Cui, Xiaoyao Lv, Yuhao Liu:
MMV Batch Look Ahead Orthogonal Matching Pursuit (M-BLAOMP) Algorithm for Joint Sparse Recovery. 1-4 - Zilong Zhang, Haichuang Yang, Xuan Zhang, Xiaoling Ding, Xuetao Wang, Yu Gong, Bo Liu:
Low-Power Keyword Recognition Feature Extraction Circuit based on SRMFCC and Shared Multiplier for High Noise Background. 1-4 - Jianguo Ni, Zhufei Chu:
An Efficient Demultiplexer Design in Quantum-dot Cellular Automata. 1-4 - Chenghao Yang, Yinshui Xia:
Power optimization with Reinforcement Learning in Logic Synthesis. 1-3 - Hongxia Liu, Guodu Han, Dong Wang:
Research on Transparent Resistive Random Memory Based on Lanthanum-based High-k Medium. 1-4 - Hang Liu, Yu Jin, XinHang Li, Duli Yu, Kedu Han, Heming Sun:
A high precision positive temperature circuit using DEM technique. 1-4 - Yanshuang Ba, Sunjie HuangFu, Miaomiao Li, Junxiao Ma, Weidong Zhu, Dazheng Chen, He Xi, Jincheng Zhang, Chunfu Zhang, Yue Hao:
All-Inorganic Two-Dimensional Ruddlesden-Popper Perovskite Cs2PbI2Cl2 Nanosheet Films for Self-Powered, Visible-Blind UV Photodetectors. 1-4 - Xiangyu Zhang, Feng Wei, Xiaoyan Liu, Xiaole Cui:
Design and Implementation of Full Adder in One-Transistor-One-Resistor RRAM Array. 1-4 - Yuanfa Wang, Yu Pang, Huan Huang, Qianneng Zhou, Jiasai Luo:
Hardware Design of Gaussian Kernel Function for Non-Linear SVM Classification. 1-4 - Bo Yi, Zheng Wu, Junji Cheng, Haimeng Huang, Moufu Kong, Hongqiang Yang:
A Vertical Thin Layer pLDMOS with Linear doping realizing ultralow Ron, sp. 1-4 - Qiang Li, Xuemei Fan, Jian Chen, Hongwei Li, Hao Liu:
A Hardware Efficient Approximate Shift Multiplier with High Accuracy. 1-5 - Wenshu Chen, Liyuan Peng, Yujie Huang, Ming-e Jing, Xiaoyang Zeng:
Knowledge Distillation for U-Net Based Image Denoising. 1-4 - Xiaoxu Kang, Xiaolan Zhong, Zhangfa Chen, Zhengkai Dao, Qiang Zhang, Hao Wan, Yamin Zhou, Ming Li, Yingjia Guo, Ran Nie, Tao Wu:
Development and Characterization of High Temperature Plasma Nitridation Process for Advanced CMOS Technology Application. 1-3 - Yuze Niu, Bingxin Liu, Jiaqi Kong, Fei Zhou, Shanzhe Yu, Wengao Lu, Yacong Zhang, Zhongjian Chen:
A 16-bit Pixel-level ADC Based on Ring Oscillator for 30μm Pitch 320 ×256 LWIR FPAs. 1-4 - Lixing Li, Deyang Chen, Xiaoyong Xue, Xiaoyang Zeng:
Combining Max Pooling and ReLU Activation Function in Stochastic Computing. 1-4 - Tao Zhong, Yuekang Guo, Jing Jin:
Analysis of SAR ADC Quantization Error and Nonlinearity in PMCW Automotive Radar. 1-4 - Mengyuan Hua, Junting Chen, Chengcai Wang, Lingling Li, Ling Liu, Zheyang Zheng, Kevin J. Chen:
E-mode p-FET-bridge HEMT: Toward high VTH, low reverse-conduction loss and enhanced stability. 1-4 - Jingqi Wang, Fan Ye, Junyan Ren:
A Three-Stage Comparator with High Speed and Low Power. 1-4 - Dongrong Zhang, Qiang Ren, Donglin Su:
An On-chip Path Delay Measurement Sensor for Aging Monitoring. 1-4 - Xiaozhe Wang, Lingzhi Su, Xiyuan Du, Yongzhen Chen, Jiangfeng Wu:
Physical Coding Sublayer For 32Gbps SerDes Based On JESD204C. 1-4 - Zheng Chai, Pedro Freitas, Weidong Zhang, Jian Fu Zhang, John S. Marsland:
True random number generator based on switching probability of volatile GeXSe1-X ovonic threshold switching selectors. 1-4 - Yan Zheng, Jingchao Lan, Fan Ye, Junyan Ren:
A 68.36 dB 12 bit 100MS/s SAR ADC with a low-noise comparator in 14-nm CMOS FinFet. 1-4 - Peiyi Zhao, Zisong Wang, Congyi Zhu, Tom Springer, Jacob Anabi, Yinshui Xia, Lingli Wang:
Ultra-low-voltage Low-power Self-adaptive Static Pulsed Latch. 1-4 - Yongjie Lu, Weifeng He:
A Dual-rail Based Dynamic Voltage and Frequency Scaling for Wide-Voltage-Range Processor. 1-4 - Yushi Chen, Yuan Yuan, Hualian Tang, Yiqi Zhuang:
A Low Power 8-bit 2b/Cycle SAR ADC with Multiple Calibration Techniques. 1-4 - Tiantian Pi, Dongqi Xiao, Hui Yang, Xiaohan Wu, Wenjun Liu, Shi-Jin Ding, David Wei Zhang:
Fabrication of high-performance a-IGZO thin-film transistor with post-annealing treatment. 1-2 - Yudi Qiu, Jie Jiao, Yuxin Tang, Yanwei Liu, Jianyu Ren, Xiaoyang Zeng, Yibo Fan:
A Heterogeneous HEVC Video Encoder System Based on Two-Level CPU-FPGA Computing Architecture. 1-4 - Yiting Wang, Zhenyin Zhang, Gengsheng Chen:
EG-HRNet: An Efficient High-Resolution Network Using Ghost-Modules for Human Pose Estimation. 1-4 - Xiaowen Zhang, Xiaoling Lin, Rui Gao:
The study of parameters variation of nMOSFET affected by the HCI. 1-4 - Bo Li, Mingjie Yang, Guoyong Shi:
Design of Analog CMOS-Memristive Neural Network Circuits for Pattern Recognition. 1-4 - Xiaoyue Zhao, Minghao Shao, Houfang Liu, Ruiting Zhao, Xichen Sun, Xiao Liu, Xiaoming Wu, Yi Yang, Tianling Ren:
Large Coercive Field in Hf0.5Zr0.5O2-based Capacitors with Gd Top Electrode. 1-4 - Li Zhang, Yunchuan Wang, Fengyi Mei, Yongzhen Chen, Jiangfeng Wu:
An Input Buffer for 4 GS/s 14-b Time-Interleaved ADC. 1-4 - Xu Chen, Junyan Ren, Shunli Ma:
A 79GHz 5-bit Phase Shifter With π-Network in 28-nm CMOS. 1-4 - Jiahui Hu, Changhao Yan, Chao Guo, Ronggui Jiang, Dian Zhou, Xuan Zeng:
A Fast Aging-aware Static Timing Analysis Prediction Frame of Digital Integrated Circuits. 1-4 - Shuai Gao, Chang Cai, Bingxu Ning, Ze He, Jie Liu:
Characterization and Classification of Heavy Ion Induced Failures in FPGA-based Logical Circuits. 1-4 - Yangyun Zhang, Yuting Xiang, Xinjie Zhang, Chunqi Shi, Runxi Zhang, Jinghong Chen:
A 22-33 GHz Wideband CMOS LNA Using Low-k Non-inverting MCCRs for 5G mmW Communication Applications. 1-4 - Xi Fan, Xuyan Wang, Yaoyao Ye, Xianglun Leng, Ningyi Xu, Guanghui He:
CCASM: A Computation- and Communication-Aware Scheduling and Mapping Algorithm for NoC-Based DNN Accelerators. 1-4 - Tao Liu, Fangxu Lv, Bin Liang, Heming Wang, Jianye Wang, Miaomiao Wu:
An Analytical Jitter Transfer Model for Mueller-Muller Clock and Data Recovery Circuits. 1-4 - Ruiqiang Song, Jiageng Shi, Jinjin Shao, Xiaoyu Zhang:
Machine Learning based SET Propagation Prediction for Large Scale Integrated Circuits. 1-4 - Ming Li, Xiaoxu Kang, Xiaolan Zhong:
Process Optimization for CMOS Compatible MEMS Capacitive Acoustic Sensor. 1-3 - Jinliang Han, Yongzhong Wen, Yuejun Zhang, Pengjun Wang, Huihong Zhang:
A 65nm Reliable Near-Subthreshold Standard Cells Design Using Schmitt Trigger. 1-4 - Donald Y. C. Lie, Y. Liu, Yves Tchatchoua, Clint Sweeney, Paul E. Lie, T. Q. Nguyen:
Latest Development on Non-Contact Vital Signs (NCVS) Sensor Systems Using Software Defined Radio (SDR). 1-4 - Makoto Ikeda:
Hardware Acceleration of Elliptic-Curve based Crypto-Algorithm, ECDSA and Pairing Engines. 1-4 - Songyan Wang, Xiaomei Fan, Zhihua Zhu, Yingtao Zhang, Ruike Chen, Juin Jei Liou:
A LVTSCR-Based Compact Structure for Latch-up Immune. 1-4 - Haoliang Zhu, Zhiqun Li, Zhennan Li, Yan Yao:
Design of Wideband Phase Modulator for 2.4~5.25 GHz Digital Polar Transmitter. 1-3 - Li Ni, Pengjun Wang, Yuejun Zhang, Jia Chen, Liwei Li, Huihong Zhang:
A Reliable Multi-information Entropy Glitch PUF Using Schmitt Trigger Sampling Method for IoT Security. 1-4 - Thurein Aung, Mahalingam Nagarajan, Kiat Seng Yeo:
A New Degeneration Technique for 60 GHz Triple Cascode Wideband Low Noise Amplifier. 1-4 - Yujie Wu, Gang Zhang, Yongzhen Chen, Jiangfeng Wu:
A 6-bit Active Phase Shifter with Quadrature Outputs. 1-4 - Yukun Zhang, Xinpeng Xing:
A 10bit 1.6GS/s Current-steering DAC in 40nm CMOS. 1-4 - Shifan Gao, Fan Yang, Liang Zhao, Yi Zhao:
Current Research Status and Future Prospect of the In-Memory Computing. 1-4 - Kangwei Ma, Fei Zhou, Yacong Zhang, Wengao Lu, Zhongjian Chen:
A low noise fully-integrated readout electronic with pile-up rejector for particle detector. 1-4 - Jiangbo Wei, Chenghao Zhang, Jiaji Ma, Zhihang Li, Maliang Liu:
An ECG Automatic Detection System with Baseline Drift Removal Based on SG Filter. 1-4 - Chang Liu, Zihao Xuan, Yi Kang:
A 40-nm 202.3nJ/Classification Neuromorphic Architecture Employing In-SRAM Charge-Domain Compute. 1-4 - Yucheng Bao, Zhijie Chen, Boyong Jin, Peiyuan Wan:
A 4x folding voltage-to-time converter with adjustable conversion gain and offset for time-based ADC. 1-4 - Xiaoqing Wen:
LSI Testing: A Core Technology to a Successful LSI Industry. 1-4 - Jiaqi Jiang, Hongbo Zhang, Yunhao Fu, Yuchun Chang:
A Phased-array Optoelectronic Detector using Phase-difference Filtering Technology for Incremental Encoder Application. 1-4 - Jiabin Qi, Feilong Qiu, Yi Zhao:
Self-powered Electrochromic Windows for Smart Homes Realized by Hybridizing Enhanced Perovskite Solar Cells. 1-4 - Qijuan Wu, Mingyu Wang, Jingjing Liu, Wenhong Li:
A Single-Slope PWM Imaging Method for Multi-Mode Dynamic Vision Sensor. 1-4 - Ming Li, Xiaoxu Kang, Xiaolan Zhong:
A Novel Etch Scheme to Form Sloped Profile by Standard Anisotropic CMOS Process. 1-4 - Hao Zhang, Aorui Gou, Yibo Fan, Xiaoyang Zeng:
A Fine-grained Sparse Neural Network Accelerator for Image Classification. 1-4 - Zhecheng Guo, Yuejun Zhang, Suling Xu, Zhixin Wu, Wanlong Zhao:
A Multi-conductance States Memristor-based CNN Circuit Using Quantization Method for Digital Recognition. 1-4 - Yan Wang, Changhao Yan, Dian Zhou, Xuan Zeng:
High-Dimensional Bayesian Optimization for Automated Analog Circuit Design via Add-Graph Structure. 1-4 - Xi Cheng, Haozhe Zhu, Jingjing Liu, Mingyu Wang, Xiaoyang Zeng:
An Efficient Markov Random Field Based Denoising Approach for Dynamic Vision Sensor. 1-4 - Yichao Zhang, Wenjie Xu, Kuanfeng Tang, Na Yan, Hao Min:
A Novel RFID Architecture supporting accurate Clock Transfer for Backscatter Communication. 1-4 - Xin Si, Yongliang Zhou, Jun Yang, Meng-Fan Chang:
Challenge and Trend of SRAM Based Computation-in-Memory Circuits for AI Edge Devices. 1-4 - Zhen Lu, Ting Yi, Zhiliang Hong:
A Review of PPG/NIRS Acquisition ASIC and System. 1-4 - Jikai Lu, Jinsong Wei, Junjie An, Chenggao Zhang, Tuo Shi, Qi Liu:
RRAM-based Analog-Weight Spiking Neural Network Accelerator with in-situ Learning for IoT Applications. 1-4 - Fuzhan Chen, Chongyun Zhang, Tianxin Min, Bo Xu, Quan Pan, C. Patrick Yue:
Design and Co-Simulation of QPSK and NRZ/PAM-4/PAM-8 VCSEL-Based Optical Links Utilizing an Integrated System Evaluation Engine. 1-4 - Ibrahim M. Abdel-Motaleb:
An Overview of Design, Fabrication, and Cooling Techniques of 3D-ICs. 1-4 - Ang Li, Yi Shen, Ziqian Li, Yuhao Zhu, Huiqing Wen, Wen Liu:
Stability Analysis of Monolithic GaN MIS-HEMT Comparator with Device PBTI and Circuit Stress Tests. 1-3 - Bingbing Ma, Longbo Fan, Wei Li, Hongtao Xu:
Design of A Reference Buffer with Ultralow Output Resistance for High-speed ADCs. 1-4 - Xianwu Hu, Dongyang Li, Yu Wang, Jiayun Feng, Zizhao Ma, Shaohao Wang, Tai Min, Xiaoyang Zeng, Yufeng Xie:
An 8Kb 40-nm 2T2MTJ STT-MRAM Design with 2.6ns Access Time and Time-Adjustable Writing Process. 1-4 - Huimin Wang, Xingyu Tong, Runming Shi, Sifei Wang, Jun Yu, Jianli Chen:
Analytical Global Placement for Heterogenous FPGAs Based on the eDensity Model. 1-4 - Shijie Chen, Tao Yang, Xiang Li, Jian Yang, Liang Qi, Yong Wang:
E/D Mode Logic Cells and Series-to-Parallel Interface with Less Transistors and Better Structure Consistence in GaAs Process. 1-3 - Guoyao Wu, Ziwei Li, Yutong Zhao, Fan Ye, Junyan Ren:
A 5-bit High-Linearity, Binary-Recombination-Redundancy Sub-SAR ADC in 300MS/s, 14-bit Pipelined-SAR ADC. 1-4 - Yanzhe Tang, Zhongming Liu, Weibing Shang, Fengqin Zhang, Bernard Wu, Zhong Kong, Hongwen Li, Hong Ma, Kanyu Cao:
Pitch Device Design in 10nm-Class DRAM Process through DTCO. 1-4 - Ye Zhou, Shanzhe Yu, Wengao Lu, Dunshan Yu, Yacong Zhang, Zhongjian Chen:
Low Power Readout Integrated Circuit with PFM-based ADCs Employing Residue Quantization for Uncooled Infrared Imagers. 1-4 - Zilu Liu, Rehan Azmat, Xinyi Liu, Li Wang, C. Patrick Yue:
On-Chip Filter for Mitigating EMI-Related Common-Mode Noise in High-Speed PAM-4 Transmitter. 1-4 - Yongshuai Sun, Mengyu Guo, Dacheng Liang, Shan Tang, Naifeng Jing:
Exploiting Dynamic Bit Sparsity in Activation for Deep Neural Network Acceleration. 1-4 - Yuyuan Tian, Lianxi Liu:
A High-Sensitivity, Low-Power Dual-Band RF Energy Harvesting and Managing System for Bio-Potential Acquisition. 1-4 - Rongyu Ding, Yi Guo, Heming Sun, Shinji Kimura:
Energy-Efficient Approximate Floating-Point Multiplier Based on Radix-8 Booth Encoding. 1-4 - Weimin Shi, Fuzhan Chen, Xinyi Liu, Chongyun Zhang, Zilu Liu, Tianxin Min, Bo Xu, Li Wang, Jian Kang, C. Patrick Yue:
An Integrated System Evaluation Engine for Cross-Domain Simulation and Design Optimization of High-Speed 5G Millimeter-Wave Wireless SoCs. 1-4 - Ziyi Zhang, Dong Lyu, Wei Xu:
Research of Scale Recurrent Generative Network on Image Inpainting. 1-4 - Haige Wu, Xuan Zhang, Xiaoling Ding, Ziyu Wang, Anfeng Xue, Yu Gong, Bo Liu:
An Always-on Ultra-Low Power Speaker Verification Accelerator based on Binary Weighted Neural Network with System Co-optimization. 1-4 - Liran Li, Pengcheng Xiao, Zhenhai Lu, Yubo Wang, Yi Hu, Yuan Guan, Kun Wang, Dameng Li, Fan Zhang:
Testing and trimming methods of high-resolution and large swing for ADC based on ATE. 1-4 - Bo Zhang, Xiaoxu Kang, Xiaolan Zhong:
Optimization of Protective Layer Process for Micro-bridge Structure based MEMS/Sensors Application. 1-4 - Peizhuo Wang, Ting Yi, Zhiliang Hong:
High-Input-Impedance Amplifiers Design for Dry-Electrode Biopotential Acquisition: A Review. 1-4 - Wen-Cheng Lai:
Integrated Homodyne Receiver Chip Design with Dual-Band Antenna. 1-4 - Tapas Dutta, Cristina Medina-Bailon, Ali Rezaei, Daniel Nagy, Fikru Adamu-Lema, Nikolas Xeni, Yassine Abourrig, Naveen Kumar, Vihar P. Georgiev, Asen Asenov:
TCAD Simulation of Novel Semiconductor Devices. 1-4 - Lingsong Zhu, Dongsheng Liu, Xiaohuan Li, Jiahao Lu, Lai Wei, Xuan Cheng:
An Efficient Hardware Architecture for Epileptic Seizure Detection using EEG Signals based on 1D-CNN. 1-4 - Jing Li, Hang Xiao, Qihui Zhang, Zhong Zhang, Wenjie Huang, Ning Ning, Qi Yu:
A Second-Order Passive Noise-Shaping SAR ADC Using the LMS-Based Mismatch Calibration. 1-4 - Zhong-Jian Bian, Xiaofeng Hong, Juntong Chen, Hao Cai:
Modified Peripheral MRAM Sensing for In-memory Boolean Logic. 1-4 - Zhifei Lu, Xizhu Peng, Zhaofeng Ren, He Tang, Bin Guo:
A Timing Mismatch Background Calibration Technique with High-Precision Skew Estimation. 1-4 - Yunchuan Wang, Li Zhang, Fengyi Mei, Yongzhen Chen, Jiangfeng Wu:
Digital Calibration of Capacitor Mismatch and Gain Error in Pipelined SAR ADCs. 1-4 - Aiqing Wu, Mengni Bie, Longmei Nan, Wei Li:
Effective Register Allocation for Configurable VLIW Crypto-Processor. 1-4 - Xin Chen, Lin Pan, Yangxin Xiang:
A New Sparsity Preserving Model Order Reduction Algorithm for Multi-terminal RC Networks. 1-4 - Cong Tao, Liangbo Lei, Jiangli Huang, Zhipeng Chen, Yumei Huang, Zhiliang Hong:
New Linearization Implementations Improving IIP3 of Wideband LNTA by More than 14dB. 1-4 - Liang Qi, Xinyu Qin, Sai-Weng Sin, Chixiao Chen, Fan Ye, Guoyong Shi, Guoxing Wang:
Advances in Continuous-time MASH ΔΣ Modulators. 1-4 - Zhiyang Zhang, Junyan Ren, Shunli Ma:
A C-Band Power Amplifier with Over-Neutralization Technique and Coupled-Line MCR Matching Methods for 5G Communication in 0.25-μm GaAs. 1-4 - Moufu Kong, Ke Huang, Bin Wang, Cong Liu, Bo Yi, Hongqiang Yang:
A Novel Trench MOSFET with p-Pillar and RSO Accumulation Layer for Improved Performance. 1-4 - Nan Li, Zengqi Wang, Weitian Liu, Qiao Zhang, Jichao Zhan, Na Yan, Tingting Han, Mi Tian, Weiqiang Zhu, Zhijian Li, Jianhua Lu:
0.5W X-Band SOI 4-Channel Beamforming TR IC. 1-4 - Xuyang Duan, Ruiqi Xie, Jun Han:
An Energy-Efficient Image Denoising Accelerator with Depth-wise Separable Convolution and Fused-Layer Architecture. 1-4 - Yi Zhou, Ming-e Jing, Fa Xu, Yibo Fan, Xiaoyang Zeng:
Mutli-level Regression Anchor-free Object Detection. 1-4 - Fan Chen, Wei Li, Chuangguo Wang, Hongtao Xu:
A 0.9V 0.1-4GHz LNTA in 28-nm CMOS Achieving +11.3dBm IIP3 With Self-loaded Linearization Technique. 1-4 - Chang Cai, Luchang Ding, Ze He, Jian Yu, Jie Liu, Jiyuan Bai, Gengsheng Chen, Jun Yu:
Simulation of SEU Response of Advanced 20 nm FDSOI SRAMs. 1-4 - Bingqing Zhao, Hailiang Xiong, Rui Yang, Zeya Xie, Shaowei Zhen, Dongmin Ding, Bo Zhang:
A Battery Powered Hybrid Dual-Path Step-Up DC-DC Converter with Output Powered Bootstrap Driver. 1-4 - Jun Jiang, Jie Sun, Chao Wang, Anquan Jiang:
Controlled domain wall directions within nanodevices integrated on the surface of LiNbO3 single crystals. 1-4 - Ziyu Zhou, Gang Li, Pengjun Wang, Ming Ye:
Matrix Encryption based Anti-Machine Learning Attack Algorithm for Strong PUF. 1-4 - Zhijian Hao, Fa Xu, Guoqing Xiang, Peng Zhang, Xiaoyang Zeng, Yibo Fan:
A Multiplier-less Transform Architecture with the Diagonal Data Mapping Transpose Memory for The AVS3 Standard. 1-4 - Xuexiang Wang, Yiran Sun, Mingming Fang:
Reconfigurable Clock Tree Design Methodology for Wide Voltage Scaling Using Custom Buffer. 1-4 - Yu Huang, Puqing Yang, Zhaofeng Zhang:
An ECG Acquisition System with Piezoelectric Energy Harvesting for Low Power Healthcare Devices. 1-4 - Tinghuan Chen, Qi Sun, Bei Yu:
Machine Learning in Nanometer AMS Design-for-Reliability : (Invited Paper). 1-4 - Liu Wang, Guojing Ye, Yumei Huang:
A Digital to Time Converter Assisted TA-TDC with High Resolution for Low Power ADPLL in 22nm CMOS. 1-4 - Shahzad Haider, Song Chen:
Effects of using Multi Voltage Threshold Transistors in Asynchronous Circuits. 1-4 - Haijun Guo, Chunwei Zhang, Hao Kan, Chao Cao:
AlGaN/GaN HEMTs with electric field modulation effect: a comprehensive study. 1-4 - Xinyu Qin, Xudong Liu, Jun Han:
A CNN Hardware Accelerator Designed for YOLO Algorithm Based on RISC-V SoC. 1-4 - Miaomiao Wu, Zhengbin Pang, Fangxu Lv, Jianjun Shi, Heming Wang, Tao Liu, Dechao Lu, Zheng Wang:
An Adaptive Equalization Algorithm for High Speed SerDes. 1-4 - Hiroshi Iwai:
NMOS LSI Development from 1970's to the beginning of 1980's. 1-4 - Masahiro Watanabe:
TCAD simulation of trench-gate IGBTs for prediction of carrier lifetime requirements for future scaled devices. 1-4 - Xiangying Tao, Duoli Zhang, Min Wang, Yan Ma, Yukun Song:
Design and Implementation of A High-speed Configurable 2D ML-CFAR Detector. 1-4 - Wenbo Peng, Xiaochuan Guo, Yahui Cai, Shuwen Guo, Xiaolong Zhao, Yongning He:
ZnO Wheatstone bridge for UV light detection. 1-3 - Chao Yuan, Ting Yi, Zhiliang Hong:
High Precision AFE Design Methodology for Wearable EEG Acquisition. 1-4 - Wei Liu, Gang Liu, Bing He, Jie Zhang, Hanlin Qin, Shuai Yuan:
Fabrication, Characterization and Modeling of CVD based Amorphous Silicon Resistor. 1-3 - Maosong Ma, Jianbin Liu, Xinhua Cai, Honglong Shi:
Deep Analysis of the SSN at LPDDR5 IO Interface. 1-4 - Yongkang Han, Yulin Zhao, Qiao Hu, Xuanzhi Liu, Bo Peng, Haijun Jiang, Jianguo Yang, Xiaoyong Xue:
Novel 15T SRAM Cell for Low Voltage High Reliability Application. 1-4 - Qianhui Fan, Wensi Wang, Xu Liu, Qiang Gao, Shuqin Geng:
A High Efficiency Re-configurable Step-down Switched Capacitor DC-DC Converter for Medical Implants Application. 1-4 - Bo Wang, Wentao Lu, Jin Wang, Kai Cheng, Fangfa Fu, Fengchang Lai, Yongsheng Wang:
A High-Precision Delta Sigma ADC with Chopper in BMS. 1-4 - Yuze Niu, Yuting Gu, Fengqing Liu, Fei Zhou, Shanzhe Yu, Wengao Lu, Yacong Zhang:
High Frame Rate High Linearity Low Power DROIC for 30μm-Pitch Cryogenic Infrared FPAs. 1-3 - Ruiqi Xie, Jun Han:
Mini-HOG: An Area-efficient and Low-power HOG Accelerator with SW/HW co-design for Real-time Pedestrian Detection. 1-4 - Chenyue Ma, Yifeng Xiao, Sifei Wang, Jun Yu, Jianli Chen:
CongestNN: An Bi-Directional Congestion Prediction Framework for Large-Scale Heterogeneous FPGAs. 1-4 - Yuki Sekine, Shogo Katayama, Yasunori Kobori, Anna Kuwana, Haruo Kobayashi:
Multi-Output SEIPC Multiplied Boost Converter with Exclusive Control. 1-4 - Gui-Yi Dong, Shogo Katayama, Yifei Sun, Yasunori Kobori, Anna Kuwana, Haruo Kobayashi:
Adaptive Convergence Method of Notch Frequency in Noise Spread Spectrum for Pulse Coding Switching DC-DC Converter. 1-4 - Tianxin Min, Jian Kang, Bo Xu, Weimin Shi, C. Patrick Yue:
Design and Verification of a 334-Mb/s DCO-OFDM Li-Fi Transceiver Using Integrated System Evaluation Engine. 1-4 - Feng Zou, Zhenming Wang, Song Ma, Liubin Li, Yuhua Cheng:
Multi-physiological Parameters Integrated Medical System for Home Healthcare Application. 1-4 - Yujie Huang, Yixuan Liu, Ming-e Jing, Mingyu Wang, Xiaoyong Xue, Xiaoyang Zeng, Yibo Fan:
Arbitrary Style Transfer via Learning to Paint in the Feature Domain. 1-4 - Hao Jiang, Jinsong Wei, Ye Li, Jikai Lu, Tuo Shi, Qi Liu:
Design of Multi-core Spiking Neural Network Chip Based on Butterfly Network. 1-4 - Yunhao Fu, Zhongyuan Zhao, Hongbo Zhang, Jiaqi Jiang, Yuchun Chang:
A Single Photon Detector Readout Circuit Based on 0.18 μm CMOS Technology. 1-4 - Yalong Pang, Shuai Jiang, Bowen Cheng, Weiwei Liu, Yuhang Wu:
Design and Implement of Median Filter toward Remote Sensing Images Based on FPGA. 1-4 - You-You Zhang, Lirida A. B. Naviner, Hao Cai:
Ultra-low Power Access Strategy for Process-Voltage-Temperature Aware STT-MRAM. 1-4 - Weidan Li, Mingmin Huang, Yun Li, Zhimei Yang, Min Gong:
A Novel Power PiN Diode with p-type Schottky Anode and Trench Oxide for Improving Reverse Recovery. 1-4 - Han Zeng, Wei Li, Tao Chen, Longmei Nan:
An Efficient Module Arithmetic Logic Unit in Dual Field for Internet of Things Applications. 1-4 - Hao Chi, Jun Xu, Fan Ye, Junyan Ren:
A High Linearity and Low Noise Anti-Aliasing Filter for ADCs. 1-4 - Siman Li, Chris Eom, Jake Jung, Brian Lee, Edwin Kim, Kanyu Cao:
Adaptive DLL Update Scheme for Power Fluctuation Immunity Using Phase Error Detector. 1-4 - Chen Dong, Limin Hao, Guoyong Shi, Zhenya Zhou, Minghou Cheng:
A Time Constant Estimation Method for Block RC Circuits with Application to Power Grid Analysis. 1-4
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