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ORCID58th DAC 2021: San Francisco, CA, USA
- 58th ACM/IEEE Design Automation Conference, DAC 2021, San Francisco, CA, USA, December 5-9, 2021. IEEE 2021, ISBN 978-1-6654-3274-0
- Jing Cao
, Zirui Lian, Weihong Liu, Zongwei Zhu, Cheng Ji:
HADFL: Heterogeneity-aware Decentralized Federated Learning Framework. 1-6 - Harry Foster:
General Chair's Message. 1 - Alejandro Hernández-Cano, Cheng Zhuo, Xunzhao Yin, Mohsen Imani:
RegHD: Robust and Efficient Regression in Hyper-Dimensional Learning System. 7-12 - Yonggan Fu, Yongan Zhang, Chaojian Li, Zhongzhi Yu, Yingyan Lin:
A3C-S: Automated Agent Accelerator Co-Search towards Efficient Deep Reinforcement Learning. 13-18 - Omid Aramoon, Pin-Yu Chen, Gang Qu:
AID: Attesting the Integrity of Deep Neural Networks. 19-24 - Minxuan Zhou, Yunhui Guo, Weihong Xu, Bin Li, Kevin W. Eliceiri, Tajana Rosing:
MAT: Processing In-Memory Acceleration for Long-Sequence Attention. 25-30 - Litong You, Tianxiao Gu, Shengan Zheng, Jianmei Guo, Sanhong Li, Yuting Chen, Linpeng Huang:
JPDHeap: A JVM Heap Design for PM-DRAM Memories. 31-36 - Jianqi Zhao, Yao Wen, Yuchen Luo, Zhou Jin, Weifeng Liu, Zhenya Zhou:
SFLU: Synchronization-Free Sparse LU Factorization for Fast Circuit Simulation on GPUs. 37-42 - Fan Zhang, Shaahin Angizi, Naima Ahmed Fahmi, Wei Zhang, Deliang Fan:
PIM-Quantifier: A Processing-in-Memory Platform for mRNA Quantification. 43-48 - Mengdi Wang, Ying Wang, Cheng Liu, Lei Zhang:
Network-on-Interposer Design for Agile Neural-Network Processor Chip Customization. 49-54 - Yuan Zhou, Hanyu Wang, Jieming Yin, Zhiru Zhang:
Distilling Arbitration Logic from Traces using Machine Learning: A Case Study on NoC. 55-60 - Anup Gangwar, Ravishankar Sreedharan, Ambica Prasad, Nitin Kumar Agarwal, Sri Harsha Gade:
Topology Agnostic Virtual Channel Assignment and Protocol Level Deadlock Avoidance in a Network-on-Chip. 61-66 - Ebadollah Taheri, Ryan Gary Kim, Mahdi Nikdast:
AdEle: An Adaptive Congestion-and-Energy-Aware Elevator Selection for Partially Connected 3D NoCs. 67-72 - Yichen Jiang, Huifeng Zhu, Dean Sullivan, Xiaolong Guo, Xuan Zhang, Yier Jin:
Quantifying Rowhammer Vulnerability for DRAM Security. 73-78 - Md Rafid Muttaki, Roshanak Mohammadivojdan, Mark M. Tehranipoor, Farimah Farahmandi:
HLock: Locking IPs at the High-Level Language. 79-84 - Durba Chatterjee, Urbi Chatterjee, Debdeep Mukhopadhyay, Aritra Hazra:
SACReD: An Attack Framework on SAC Resistant Delay-PUFs leveraging Bias and Reliability Factors. 85-90 - Nimisha Limaye, Animesh Basak Chowdhury, Christian Pilato, Mohammed Thari Nabeel, Ozgur Sinanoglu, Siddharth Garg, Ramesh Karri:
Fortifying RTL Locking Against Oracle-Less (Untrusted Foundry) and Oracle-Guided Attacks. 91-96 - Yuhong Liang, Ming-Chang Yang:
Move-On-Modify: An Efficient yet Crash-Consistent Update Strategy for Interlaced Magnetic Recording. 97-102 - Yungang Pan, Zhiping Jia, Zhaoyan Shen, Bingzhe Li, Wanli Chang, Zili Shao:
Reinforcement Learning-Assisted Cache Cleaning to Mitigate Long-Tail Latency in DM-SMR. 103-108 - Fei Wen, Mian Qin, Paul Gratz, A. L. Narasimha Reddy:
OpenMem: Hardware/Software Cooperative Management for Mobile Memory System. 109-114 - Changlong Li, Liang Shi, Chun Jason Xue:
MobileSwap: Cross-Device Memory Swapping for Mobile Devices. 115-120 - Di Gao, Qingrong Huang, Grace Li Zhang, Xunzhao Yin, Bing Li, Ulf Schlichtmann, Cheng Zhuo:
Bayesian Inference Based Robust Computing on Memristor Crossbar. 121-126 - Naimul Hassan, Alexander J. Edwards, Dhritiman Bhattacharya, Mustafa M. Shihab, Varun Venkat, Peng Zhou, Xuan Hu, Shamik Kundu, Abraham Peedikayil Kuruvila, Kanad Basu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman:
Secure Logic Locking with Strain-Protected Nanomagnet Logic. 127-132 - Ghasem Pasandi, Massoud Pedram:
qSeq: Full Algorithmic and Tool Support for Synthesizing Sequential Circuits in Superconducting SFQ Technology. 133-138 - Jun Shiomi, Shuya Kotsugi, Boyu Dong, Hidetoshi Onodera, Akihiko Shinya, Masaya Notomi:
Tamper-Resistant Optical Logic Circuits Based on Integrated Nanophotonics. 139-144 - Vidushi Goyal, Valeria Bertacco, Reetuparna Das:
MyML: User-Driven Machine Learning. 145-150 - Shuo Huai, Lei Zhang, Di Liu, Weichen Liu, Ravi Subramaniam:
ZeroBN: Learning Compact Neural Networks For Latency-Critical Edge Systems. 151-156 - Sagar Verma, Supriya Agrawal, R. Venkatesh, Ulka Shrotri, Srinarayana Nagarathinam, Rajesh Jayaprakash, Aabriti Dutta:
EImprove - Optimizing Energy and Comfort in Buildings based on Formal Semantics and Reinforcement Learning. 157-162 - Zhenge Jia, Feng Hong, Lichuan Ping, Yiyu Shi, Jingtong Hu:
Enabling On-Device Model Personalization for Ventricular Arrhythmias Detection by Generative Adversarial Networks. 163-168 - Xiaopeng Zhang, Haoyu Yang, Evangeline F. Y. Young:
Attentional Transfer is All You Need: Technology-aware Layout Pattern Generation. 169-174 - Bingshu Wang, Lanfan Jiang, Wenxing Zhu, Longkun Guo, Jianli Chen, Yao-Wen Chang:
Two-Stage Neural Network Classifier for the Data Imbalance Problem with Application to Hotspot Detection. 175-180 - Sean Shang-En Tseng, Iris Hui-Ru Jiang, James P. Shiely:
Subresolution Assist Feature Insertion by Variational Adversarial Active Learning and Clustering with Data Point Retrieval. 181-186 - Junzhe Cai, Changhao Yan, Yuzhe Ma, Bei Yu, Dian Zhou, Xuan Zeng:
NeurFill: Migrating Full-Chip CMP Simulators to Neural Networks for Model-Based Dummy Filling Synthesis. 187-192 - Liang Zhao, Chu Yan, Fan Yang, Shifan Gao, Gabriel Rosca, Dan Manea, Zhichao Lu, Yi Zhao:
A Compute-in-Memory Architecture Compatible with 3D NAND Flash that Parallelly Activates Multi-Layers. 193-198 - Orian Leitersdorf, Ben Perach, Ronny Ronen, Shahar Kvatinsky:
Efficient Error-Correcting-Code Mechanism for High-Throughput Memristive Processing-in-Memory. 199-204 - Lei He, Cheng Liu, Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li:
GCiM: A Near-Data Processing Accelerator for Graph Construction. 205-210 - Fan Zhang, Shaahin Angizi, Deliang Fan:
Max-PIM: Fast and Efficient Max/Min Searching in DRAM. 211-216 - Rozhin Yasaei, Shih-Yuan Yu, Emad Kasaeyan Naeini, Mohammad Abdullah Al Faruque:
GNN4IP: Graph Neural Network for Hardware Intellectual Property Piracy Detection. 217-222 - Rajat Sadhukhan, Sayandeep Saha, Debdeep Mukhopadhyay:
Shortest Path to Secured Hardware: Domain Oriented Masking with High-Level-Synthesis. 223-228 - Gaurav Kolhe, Soheil Salehi, Tyler David Sheaves, Houman Homayoun, Setareh Rafatirad, Sai Manoj P. D., Avesta Sasan:
Securing Hardware via Dynamic Obfuscation Utilizing Reconfigurable Interconnect and Logic Blocks. 229-234 - Michael Zuzak, Yuntao Liu, Ankur Srivastava:
A Resource Binding Approach to Logic Obfuscation. 235-240 - Changchun Zhou, Min Liu, Siyuan Qiu, Yifan He, Hailong Jiao:
An Energy-Efficient Low-Latency 3D-CNN Accelerator Leveraging Temporal Locality, Full Zero-Skipping, and Hierarchical Load Balance. 241-246 - Jounghoo Lee, Jinwoo Choi, Jaeyeon Kim, Jinho Lee, Youngsok Kim:
Dataflow Mirroring: Architectural Support for Highly Efficient Fine-Grained Spatial Multitasking on Systolic-Array NPUs. 247-252 - Geonhwa Jeong, Eric Qin, Ananda Samajdar, Christopher J. Hughes, Sreenivas Subramoney, Hyesoon Kim, Tushar Krishna:
RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU. 253-258 - Je Yang, Seongmin Hong, Joo-Young Kim:
FIXAR: A Fixed-Point Deep Reinforcement Learning Platform with Quantization-Aware Training and Adaptive Parallelism. 259-264 - Martin Rapp, Mohammed Bakr Sikal, Heba Khdr, Jörg Henkel:
SmartBoost: Lightweight ML-Driven Boosting for Thermally-Constrained Many-Core Processors. 265-270 - Vijay Kandiah, Ali Murat Gök, Georgios Tziantzioulis, Nikos Hardavellas:
ST2 GPU: An Energy-Efficient GPU Design with Spatio-Temporal Shared-Thread Speculative Adders. 271-276 - Sandro M. Marques, Thiarles S. Medeiros, Fábio Diniz Rossi, Marcelo Caggiani Luizelli, Antonio Carlos Schneider Beck, Arthur Francisco Lorenzon:
Synergically Rebalancing Parallel Execution via DCT and Turbo Boosting. 277-282 - Rassul Bairamkulov, Abinash Roy, Mali Nagarajan, Vaishnav Srinivas, Eby G. Friedman:
SPROUT - Smart Power ROUting Tool for Board-Level Exploration and Prototyping. 283-288 - Hsu-Kang Dow, Tuo Li, William Miles, Sri Parameswaran:
SHORE: Hardware/Software Method for Memory Safety Acceleration on RISC-V. 289-294 - Yukui Luo, Cheng Gongye, Yunsi Fei, Xiaolin Xu:
DeepStrike: Remotely-Guided Fault Injection Attacks on DNN Accelerator in Cloud-FPGA. 295-300 - Ke Xia, Yukui Luo, Xiaolin Xu, Sheng Wei:
SGX-FPGA: Trusted Execution Environment for CPU-FPGA Heterogeneous Architecture. 301-306 - Wende Tan, Yuan Li, Chao Zhang, Xingman Chen, Songtao Yang, Ying Liu, Jianping Wu:
ROLoad: Securing Sensitive Operations with Pointee Integrity. 307-312 - Ivan De Oliveira Nunes, Sashidhar Jakkamsetti, Gene Tsudik:
DIALED: Data Integrity Attestation for Low-end Embedded Devices. 313-318 - Pantea Kiaei, Cees-Bart Breunesse, Mohsen Ahmadi, Patrick Schaumont, Jasper Van Woudenberg:
Rewrite to Reinforce: Rewriting the Binary to Apply Countermeasures against Fault Injection. 319-324 - Pramesh Pandey, Noel Daniel Gundi, Koushik Chakraborty, Sanghamitra Roy:
UPTPU: Improving Energy Efficiency of a Tensor Processing Unit through Underutilization Based Power-Gating. 325-330 - Santosh Shetty, Benjamin Carrión Schäfer:
Enabling the Design of Behavioral Systems-on-Chip. 331-336 - Kanghyun Choi, Deokki Hong, Hojae Yoon, Joonsang Yu, Youngsok Kim, Jinho Lee:
DANCE: Differentiable Accelerator/Network Co-Exploration. 337-342 - Jackson Woodruff, Michael F. P. O'Boyle:
New Regular Expressions on Old Accelerators. 343-348 - Nathaniel Bleier, John Sartori, Rakesh Kumar:
Property-driven Automatic Generation of Reduced-ISA Hardware. 349-354 - Hebi Li, Youbiao He, Qi Xiao, Jin Tian, Forrest Sheng Bao:
BHDL: A Lucid, Expressive, and Embedded Programming Language and System for PCB Designs. 355-360 - Haowen Fang, Brady Taylor, Ziru Li, Zaidao Mei, Hai Helen Li, Qinru Qiu:
Neuromorphic Algorithm-hardware Codesign for Temporal Pattern Learning. 361-366 - Amar Shrestha, Haowen Fang, Daniel Patrick Rider, Zaidao Mei, Qinru Qiu:
In-Hardware Learning of Multilayer Spiking Neural Networks on a Neuromorphic Processor. 367-372 - Seongsik Park, Dongjin Lee, Sungroh Yoon:
Noise-Robust Deep Spiking Neural Networks with Temporal Information. 373-378 - Rachmad Vidya Wicaksana Putra, Muhammad Abdullah Hanif, Muhammad Shafique:
SparkXD: A Framework for Resilient and Energy-Efficient Spiking Neural Network Inference using Approximate DRAM. 379-384 - Maxence Bouvier, Alexandre Valentian, Gilles Sicard:
Scalable Pitch-Constrained Neural Processing Unit for 3D Integration with Event-Based Imagers. 385-390 - Dongning Ma, Jianmin Guo, Yu Jiang, Xun Jiao:
HDTest: Differential Fuzz Testing of Brain-Inspired Hyperdimensional Computing. 391-396 - Yixuan Wang, Chao Huang, Zhilu Wang, Shichao Xu, Zhaoran Wang, Qi Zhu:
Cocktail: Learn a Better Neural Network Controller from Multiple Experts via Adaptive Mixing and Robust Distillation. 397-402 - Mohanad Odema, Nafiul Rashid, Berken Utku Demirel, Mohammad Abdullah Al Faruque:
LENS: Layer Distribution Enabled Neural Architecture Search in Edge-Cloud Hierarchies. 403-408 - Min Li, Yu Li, Ye Tian, Li Jiang, Qiang Xu:
AppealNet: An Efficient and Highly-Accurate Edge/Cloud Collaborative Architecture for DNN Inference. 409-414 - Chengsi Gao, Ying Wang, Weiwei Chen, Lei Zhang:
An Intelligent Video Processing Architecture for Edge-cloud Video Streaming. 415-420 - Ruoyang Liu, Lu Zhang, Jingyu Wang, Huazhong Yang, Yongpan Liu:
PETRI: Reducing Bandwidth Requirement in Smart Surveillance by Edge-Cloud Collaborative Adaptive Frame Clustering and Pipelined Bidirectional Tracking. 421-426 - Guoqi Xie, Debayan Roy, Yawen Zhang, Renfa Li, Wanli Chang:
Obfuscated Priority Assignment to CAN-FD Messages with Dependencies: A Swapping-based and Affix-Matching Approach. 427-432 - Niels Gleinig, Torsten Hoefler:
An Efficient Algorithm for Sparse Quantum State Preparation. 433-438 - Yuan-Hung Tsai, Jie-Hong R. Jiang, Chiao-Shan Jhang:
Bit-Slicing the Hilbert Space: Scaling Up Accurate Quantum Circuit Simulation. 439-444 - Lei Xie, Jidong Zhai, Weimin Zheng:
Mitigating Crosstalk in Quantum Computers through Commutativity-Based Instruction Reordering. 445-450 - Yosuke Ueno, Masaaki Kondo, Masamitsu Tanaka, Yasunari Suzuki, Yutaka Tabuchi:
QECOOL: On-Line Quantum Error Correction with a Superconducting Decoder for Surface Code. 451-456 - Chen-Hao Hsu, Wan-Hsuan Lin, Wei-Hsiang Tseng, Yao-Wen Chang:
A Bridge-based Compression Algorithm for Topological Quantum Circuits. 457-462 - Daniel Volya, Prabhat Mishra:
Quantum Spectral Clustering of Mixed Graphs. 463-468 - Jacob R. Stevens, Rangharajan Venkatesan, Steve Dai, Brucek Khailany, Anand Raghunathan:
Softermax: Hardware/Software Co-Design of an Efficient Softmax for Transformers. 469-474 - Salim Ullah, Siva Satyendra Sahoo, Akash Kumar:
CLAppED: A Design Framework for Implementing Cross-Layer Approximation in FPGA-based Embedded Systems. 475-480 - Georgios Zervakis, Ourania Spantidi, Iraklis Anagnostopoulos, Hussam Amrouch, Jörg Henkel:
Control Variate Approximation for DNN Accelerators. 481-486 - Nanyang Ye, Jingbiao Mei, Zhicheng Fang, Yuwen Zhang, Ziqing Zhang, Huaying Wu, Xiaoyao Liang:
BayesFT: Bayesian Optimization for Fault Tolerant Neural Network Architecture. 487-492 - Tianyun Zhang, Xiaolong Ma, Zheng Zhan, Shanglin Zhou, Caiwen Ding, Makan Fardad, Yanzhi Wang:
A Unified DNN Weight Pruning Framework Using Reweighted Optimization Methods. 493-498 - Shuyuan Yu, Yibo Liu, Sheldon X.-D. Tan:
COSAIM: Counter-based Stochastic-behaving Approximate Integer Multiplier for Deep Neural Networks. 499-504 - Mohsen Hassanpourghadi, Shiyu Su, Rezwan A. Rasul, Juzheng Liu, Qiaochu Zhang, Mike Shuo-Wei Chen:
Circuit Connectivity Inspired Neural Network for Analog Mixed-Signal Functional Modeling. 505-510 - Zhongkai Wang, Minsoo Choi, Eric Chang, John Charles Wright, Wooham Bae, Sijun Du, Zhaokai Liu, Nathan Narevsky, Colin Schmidt, Ayan Biswas, Borivoje Nikolic, Elad Alon:
An Automated and Process-Portable Generator for Phase-Locked Loop. 511-516 - Jialin Lu, Liangbo Lei, Fan Yang, Changhao Yan, Xuan Zeng:
Automated Compensation Scheme Design for Operational Amplifier via Bayesian Optimization. 517-522 - Hyojin Choi, In Huh, Seungju Kim, Jeonghoon Ko, Changwook Jeong, Hyeonsik Son, Kiwon Kwon, Joonwan Chai, Younsik Park, Jaehoon Jeong, Daesin Kim, Jung Yun Choi:
Application of Deep Reinforcement Learning to Dynamic Verification of DRAM Designs. 523-528 - Sadullah Canakci, Leila Delshadtehrani, Furkan Eris, Michael Bedford Taylor, Manuel Egele, Ajay Joshi:
DirectFuzz: Automated Test Generation for RTL Designs using Directed Graybox Fuzzing. 529-534 - Marcelo Orenes-Vera, Aninda Manocha, David Wentzlaff, Margaret Martonosi:
AutoSVA: Democratizing Formal Verification of RTL Module Interactions. 535-540 - Rodrigo Otoni, Martin Blicha, Patrick Eugster, Antti E. J. Hyvärinen, Natasha Sharygina:
Theory-Specific Proof Steps Witnessing Correctness of SMT Executions. 541-546 - Kaichen Yang, Xuan-Yi Lin, Yixin Sun, Tsung-Yi Ho, Yier Jin:
3D-Adv: Black-Box Adversarial Attacks against Deep Learning Models through 3D Sensors. 547-552 - Alejandro Hernández-Cano, Rosario Cammarota, Mohsen Imani:
PRID: Model Inversion Privacy Attacks in Hyperdimensional Learning Systems. 553-558 - Sai Kiran Cherupally, Adnan Siraj Rakin, Shihui Yin, Mingoo Seok, Deliang Fan, Jae-sun Seo:
Leveraging Noise and Aggressive Quantization of In-Memory Computing for Robust DNN Hardware Against Adversarial Input and Weight Attacks. 559-564 - Deboleena Roy, Indranil Chakraborty, Timur Ibrayev, Kaushik Roy:
On the Intrinsic Robustness of NVM Crossbars Against Adversarial Attacks. 565-570 - Bosheng Liu, Zhuoshen Jiang, Jigang Wu, Xiaoming Chen, Yinhe Han, Peng Liu:
F3D: Accelerating 3D Convolutional Neural Networks in Frequency Space Using ReRAM. 571-576 - Yintao He, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li:
TARe: Task-Adaptive in-situ ReRAM Computing for Graph Learning. 577-582 - Tao Yang, Dongyue Li, Yibo Han, Yilong Zhao, Fangxin Liu, Xiaoyao Liang, Zhezhi He, Li Jiang:
PIMGCN: A ReRAM-Based PIM Design for Graph Convolutional Network Acceleration. 583-588 - Chen-Yang Tsai, Chin-Fu Nien, Tz-Ching Yu, Hung-Yu Yeh, Hsiang-Yun Cheng:
RePIM: Joint Exploitation of Activation and Weight Repetitions for In-ReRAM DNN Acceleration. 589-594 - Yun-Chih Chen, Chun-Feng Wu, Yuan-Hao Chang, Tei-Wei Kuo:
Reptail: Cutting Storage Tail Latency with Inherent Redundancy. 595-600 - Lixiang Li, Yao Chen, Zacharie Zirnheld, Pan Li, Cong Hao:
MELOPPR: Software/Hardware Co-design for Memory-efficient Low-latency Personalized PageRank. 601-606 - Aryan Deshwal, Syrine Belakaria, Ganapati Bhat, Janardhan Rao Doppa, Partha Pratim Pande:
Learning Pareto-Frontier Resource Management Policies for Heterogeneous SoCs: An Information-Theoretic Approach. 607-612 - Xinzhe Liu, Fupeng Chen, Raees Kizhakkumkara Muhamad, David Blinder, Dessislava Nikolova, Peter Schelkens, Francky Catthoor, Yajun Ha:
Bitwidth-Optimized Energy-Efficient FFT Design via Scaling Information Propagation. 613-618 - Keerthikumara Devarajegowda, Endri Kaja, Sebastian Siegfried Prebeck, Wolfgang Ecker:
ISA Modeling with Trace Notation for Context Free Property Generation. 619-624 - Xingyu Meng, Kshitij Raj, Atul Prasad Deb Nath, Kanad Basu, Sandip Ray:
SoCCAR: Detecting System-on-Chip Security Violations Under Asynchronous Resets. 625-630 - Meng Sha, Xin Chen, Yuzhe Ji, Qingye Zhao, Zhengfeng Yang, Wang Lin, Enyi Tang, Qiguang Chen, Xuandong Li:
Synthesizing Barrier Certificates of Neural Network Controlled Continuous Systems via Approximations. 631-636 - Xin Hong, Mingsheng Ying, Yuan Feng, Xiangzhen Zhou, Sanjiang Li:
Approximate Equivalence Checking of Noisy Quantum Circuits. 637-642 - Antonio Cipolletta, Andrea Calimera:
On The Efficiency of Sparse-Tiled Tensor Graph Processing For Low Memory Usage. 643-648 - Yu-Pei Liang, Yung-Han Hsu, Tseng-Yi Chen, Shuo-Han Chen, Hsin-Wen Wei, Tsan-sheng Hsu, Wei-Kuan Shih:
Eco-feller: Minimizing the Energy Consumption of Random Forest Algorithm by an Eco-pruning Strategy over MLC NVRAM. 649-654 - Yawen Wu, Zhepeng Wang, Dewen Zeng, Yiyu Shi, Jingtong Hu:
Enabling On-Device Self-Supervised Contrastive Learning with Selective Data Contrast. 655-660 - Chenyang Li, Tian Xia, Wenzhe Zhao, Nanning Zheng, Pengju Ren:
SpV8: Pursuing Optimal Vectorization and Regular Computation Pattern in SpMV. 661-666 - Sören Tempel, Vladimir Herdt, Rolf Drechsler:
Towards Reliable Spatial Memory Safety for Embedded Software by Combining Checked C with Concolic Testing. 667-672 - Daniele Cattaneo, Michele Chiari, Nicola Fossati, Stefano Cherubin, Giovanni Agosta:
Architecture-aware Precision Tuning with Multiple Number Representation Systems. 673-678 - Menglong Cui, Mingsong Lv, Qingqiang He, Caiqi Zhang, Chuancai Gu, Tao Yang, Nan Guan:
PRUID: Practical User Interface Distribution for Multi-surface Computing. 679-684 - Francesco Lumpp, Hiren D. Patel, Nicola Bombieri:
A Framework for Optimizing CPU-iGPU Communication on Embedded Platforms. 685-690 - Emre Karabulut, Aydin Aysu:
FALCON Down: Breaking FALCON Post-Quantum Signature Scheme through Side-Channel Attacks. 691-696 - Shuwen Deng, Jakub Szefer:
New Predictor-Based Attacks in Processors. 697-702