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2020 – today
- 2022
[j61]Reza Ghanaatian
, Marco Widmer, Andreas Burg:
Design for Test With Unreliable Memories by Restoring the Beauty of Randomness. IEEE Des. Test 39(2): 112-120 (2022)- [j60]Yifei Shen, Alexios Balatsoukas-Stimming, Xiaohu You, Chuan Zhang, Andreas Peter Burg:
Dynamic SCL Decoder With Path-Flipping for 5G Polar Codes. IEEE Wirel. Commun. Lett. 11(2): 391-395 (2022) - [c154]Adrian Schumacher, Ruben Merz, Andreas Burg:
Increasing Cellular Network Energy Efficiency for Railway Corridors. DATE 2022: 1103-1106 - [c153]Yifei Shen, Yuqing Ren, Andreas Toftegaard Kristensen, Alexios Balatsoukas-Stimming, Xiaohu You, Chuan Zhang, Andreas Peter Burg:
Fast Sequence Repetition Node-Based Successive Cancellation List Decoding for Polar Codes. ICC 2022: 116-122 - [c152]Sitian Li, Alexios Balatsoukas-Stimming, Andreas Burg:
Device-free Movement Tracking using the UWB Channel Impulse Response with Machine Learning. SPAWC 2022: 1-5 - [i40]Yuqing Ren, Andreas Toftegaard Kristensen, Yifei Shen, Alexios Balatsoukas-Stimming, Chuan Zhang, Andreas Burg:
A Sequence Repetition Node-Based Successive Cancellation List Decoder for 5G Polar Codes: Algorithm and Implementation. CoRR abs/2205.08857 (2022) - [i39]Adrian Schumacher, Ruben Merz, Andreas Burg:
Increasing Cellular Network Energy Efficiency for Railway Corridors. CoRR abs/2205.11808 (2022) - 2021
- [j59]Adrian Schumacher, Ruben Merz, Andreas Burg:
Adding Indoor Capacity without Fiber Backhaul: An mmWave Bridge Prototype. IEEE Commun. Mag. 59(4): 110-115 (2021) - [j58]Orion Afisiadis, Sitian Li, Joachim Tapparel, Andreas Burg, Alexios Balatsoukas-Stimming:
On the Advantage of Coherent LoRa Detection in the Presence of Interference. IEEE Internet Things J. 8(14): 11581-11593 (2021) - [j57]Joachim Tapparel, Mathieu Xhonneux, David Bol, Jérôme Louveaux, Andreas Burg:
Enhancing the Reliability of Dense LoRaWAN Networks With Multi-User Receivers. IEEE Open J. Commun. Soc. 2: 2725-2738 (2021) - [j56]Flavio Ponzina, Miguel Peón Quirós, Andreas Burg, David Atienza:
E2CNNs: Ensembles of Convolutional Neural Networks to Improve Robustness Against Memory Errors in Edge-Computing Devices. IEEE Trans. Computers 70(8): 1199-1212 (2021) - [j55]Mohammad Rowshan, Andreas Burg, Emanuele Viterbo:
Polarization-Adjusted Convolutional (PAC) Codes: Sequential Decoding vs List Decoding. IEEE Trans. Veh. Technol. 70(2): 1434-1447 (2021) - [c151]Mathieu Xhonneux, Joachim Tapparel, Péter Scheepers, Orion Afisiadis, Alexios Balatsoukas-Stimming, David Bol, Jérôme Louveaux, Andreas Burg:
A Two-User Successive Interference Cancellation LoRa Receiver with Soft-Decoding. ACSCC 2021: 948-953 - [c150]Naci Pekcokguler, Dominique Morche, Adrian Frischknecht, Christoph Gerum, Andreas Burg, Catherine Dehollain:
Dynamic Range and Complexity Optimization of Mixed-Signal Machine Learning Systems. ISCAS 2021: 1-5 - [c149]Naci Pekcokguler, Mickael Maman, Andreas Burg, Catherine Dehollain, Dominique Morche:
A Novel RF Spectrum Monitoring Architecture for an Ultra-Low-Power Wi-Fi Geopositioning System. NEWCAS 2021: 1-4 - [c148]Adrian Schumacher, Nima Jamaly, Ruben Merz, Andreas Burg:
Improving railway track coverage with mmWave bridges: A Measurement Campaign. 5G-MeMZ@SIGCOMM 2021: 8-13 - [c147]Sitian Li, Andreas Toftegaard Kristensen, Andreas Burg, Alexios Balatsoukas-Stimming:
ComplexBeat: Breathing Rate Estimation from Complex CSI. SiPS 2021: 217-222 - [i38]Arthur Gassner, Claudiu Musat, Alexandru Rusu, Andreas Burg:
OpenCSI: An Open-Source Dataset for Indoor Localization Using CSI-Based Fingerprinting. CoRR abs/2104.07963 (2021) - [i37]Adrian Schumacher, Ruben Merz, Andreas Burg:
3.5 GHz Coverage Assessment with a 5G Testbed. CoRR abs/2105.06812 (2021) - [i36]Adrian Schumacher, Ruben Merz, Andreas Burg:
A mmWave Bridge Concept to Solve the Cellular Outdoor-to-Indoor Challenge. CoRR abs/2105.06885 (2021) - [i35]Adrian Schumacher, Ruben Merz, Andreas Burg:
Adding Indoor Capacity Without Fiber Backhaul: A mmWave Bridge Prototype. CoRR abs/2105.06911 (2021) - 2020
- [j54]Benoît W. Denkinger, Flavio Ponzina, Soumya Basu, Andrea Bonetti, Szabolcs Balási, Martino Ruggiero, Miguel Peón Quirós, Davide Rossi, Andreas Burg, David Atienza:
Impact of Memory Voltage Scaling on Accuracy and Resilience of Deep Learning Based Edge Devices. IEEE Des. Test 37(2): 84-92 (2020) - [j53]Chuan Zhang, Yeong-Luh Ueng, Christoph Studer, Andreas Burg:
Artificial Intelligence for 5G and Beyond 5G: Implementations, Algorithms, and Optimizations. IEEE J. Emerg. Sel. Topics Circuits Syst. 10(2): 145-148 (2020) - [j52]Chuan Zhang, Yeong-Luh Ueng, Christoph Studer, Andreas Burg:
Artificial Intelligence for 5G and Beyond 5G: Implementations, Algorithms, and Optimizations. IEEE J. Emerg. Sel. Topics Circuits Syst. 10(2): 149-163 (2020) - [j51]Yann Kurzo, Andreas Toftegaard Kristensen, Andreas Burg, Alexios Balatsoukas-Stimming:
Hardware Implementation of Neural Self-Interference Cancellation. IEEE J. Emerg. Sel. Topics Circuits Syst. 10(2): 204-216 (2020) - [j50]Gain Kim, Marcel A. Kossel, Alessandro Cevrero, Ilter Özkaya, Andreas Burg, Thomas Toifl, Yusuf Leblebici, Lukas Kull, Danny Luu, Matthias Braendli, Christian Menolfi, Pier Andrea Francese, Hazar Yueksel, Cosimo Aprile, Thomas Morf:
A 161-mW 56-Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14-nm FinFET. IEEE J. Solid State Circuits 55(1): 38-48 (2020) - [j49]Robert Giterman, Andrea Bonetti, Ester Vicario Bravo, Tzachi Noy, Adam Teman, Andreas Burg:
Current-Based Data-Retention-Time Characterization of Gain-Cell Embedded DRAMs Across the Design and Variations Space. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 67-I(4): 1207-1217 (2020) - [j48]Michael Meidlinger, Gerald Matz, Andreas Burg:
Design and Decoding of Irregular LDPC Codes Based on Discrete Message Passing. IEEE Trans. Commun. 68(3): 1329-1343 (2020) - [j47]Andrea Bonetti, Roman Golman, Robert Giterman, Adam Teman, Andreas Burg:
Gain-Cell Embedded DRAMs: Modeling and Design Space. IEEE Trans. Very Large Scale Integr. Syst. 28(3): 646-659 (2020) - [j46]Orion Afisiadis, Matthieu Cotting, Andreas Burg, Alexios Balatsoukas-Stimming:
On the Error Rate of the LoRa Modulation With Interference. IEEE Trans. Wirel. Commun. 19(2): 1292-1304 (2020) - [c146]Andreas Toftegaard Kristensen, Alexios Balatsoukas-Stimming, Andreas Burg:
On the Implementation Complexity of Digital Full-Duplex Self-Interference Cancellation. ACSSC 2020: 969-973 - [c145]Mathieu Xhonneux, Joachim Tapparel, Orion Afisiadis, Alexios Balatsoukas-Stimming, Andreas Burg:
A Maximum-Likelihood-based Multi-User LoRa Receiver Implemented in GNU Radio. ACSSC 2020: 1106-1111 - [c144]Andreas Toftegaard Kristensen, Robert Giterman, Alexios Balatsoukas-Stimming, Andreas Burg:
Lupulus: A Flexible Hardware Accelerator for Neural Networks. ICASSP 2020: 1608-1612 - [c143]Orion Afisiadis, Andreas Burg, Alexios Balatsoukas-Stimming:
Coded LoRa Frame Error Rate Analysis. ICC 2020: 1-6 - [c142]Andreas Toftegaard Kristensen, Andreas Burg, Alexios Balatsoukas-Stimming:
Identification of Non-Linear RF Systems using Backpropagation. ICC Workshops 2020: 1-6 - [c141]Sitian Li, Andreas Burg, Alexios Balatsoukas-Stimming:
Training Channel Selection for Learning-Based 1-Bit Precoding in Massive MU-MIMO. ICC Workshops 2020: 1-6 - [c140]Andrea Bonetti, Roman Golman, Robert Giterman, Adam Teman, Andreas Burg:
Gain-Cell Embedded DRAMs: Modeling and Design Space. ISCAS 2020: 1 - [c139]Robert Giterman, Andrea Bonetti, Andreas Burg, Adam Teman:
GC-eDRAM with Body-Bias Compensated Readout and Error Detection in 28nm FD-SOI. ISCAS 2020: 1 - [c138]Mohammad Rowshan, Andreas Burg, Emanuele Viterbo:
Complexity-efficient Fano Decoding of Polarization-adjusted Convolutional (PAC) Codes. ISITA 2020: 200-204 - [c137]Ning Xu, Sitian Li, Clement Serge Charollais, Andreas Burg, Adrian Schumacher:
Machine Learning Based Outdoor Localization using the RSSI of Multibeam Antennas. SiPS 2020: 1-5 - [c136]Joachim Tapparel, Orion Afisiadis, Paul Mayoraz, Alexios Balatsoukas-Stimming, Andreas Burg:
An Open-Source LoRa Physical Layer Prototype on GNU Radio. SPAWC 2020: 1-5 - [c135]Adrian Schumacher, Ruben Merz, Andreas Burg:
A mmWave Bridge Concept to Solve the Cellular Outdoor-to-Indoor Challenge. VTC Spring 2020: 1-6 - [i34]Yann Kurzo, Andreas Toftegaard Kristensen, Andreas Burg, Alexios Balatsoukas-Stimming:
Hardware Implementation of Neural Self-Interference Cancellation. CoRR abs/2001.04543 (2020) - [i33]Andreas Toftegaard Kristensen, Andreas Burg, Alexios Balatsoukas-Stimming:
Identification of Non-Linear RF Systems Using Backpropagation. CoRR abs/2001.09877 (2020) - [i32]Mohammad Rowshan, Andreas Burg, Emanuele Viterbo:
Polarization-adjusted Convolutional (PAC) Codes: Fano Decoding vs List Decoding. CoRR abs/2002.06805 (2020) - [i31]Andreas Toftegaard Kristensen, Robert Giterman, Alexios Balatsoukas-Stimming, Andreas Burg:
Lupulus: A Flexible Hardware Accelerator for Neural Networks. CoRR abs/2005.01016 (2020)
2010 – 2019
- 2019
- [j45]Andreas Burg, Matthew M. Ziegler, Saibal Mukhopdhyay:
Conference Report from the 2019 International Symposium on Low Power Electronics and Design (ISLPED). IEEE Des. Test 36(6): 82-83 (2019) - [j44]Robert Giterman, Andrea Bonetti, Andreas Burg, Adam Teman:
GC-eDRAM With Body-Bias Compensated Readout and Error Detection in 28-nm FD-SOI. IEEE Trans. Circuits Syst. II Express Briefs 66-II(12): 2042-2046 (2019) - [j43]Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho, Rolf Drechsler, Ibrahim Abe M. Elfadel, Ruonan Han, Masanori Hashimoto, Chun-Huat Heng, Deukhyoun Heo, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Ajay Joshi, Rajiv V. Joshi, Tanay Karnik, Chulwoo Kim, Tony Tae-Hyoung Kim, Jaydeep Kulkarni, Volkan Kursun, Yoonmyung Lee, Hai Helen Li, Huawei Li, Prabhat Mishra, Baker Mohammad, Mehran Mozaffari Kermani, Makoto Nagata, Koji Nii, Partha Pratim Pande, Bipul C. Paul, Vasilis F. Pavlidis, José Pineda de Gyvez, Ioannis Savidis, Patrick Schaumont, Fabio Sebastiano, Anirban Sengupta, Mingoo Seok, Mircea R. Stan, Mark M. Tehranipoor, Aida Todri-Sanial, Marian Verhelst, Valerio Vignoli, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Jun Zhou, Mark Zwolinski, Stacey Weber:
Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. IEEE Trans. Very Large Scale Integr. Syst. 27(2): 253-280 (2019) - [j42]Emmanuel Boutillon, Andreas Burg:
Editor's Note: Special Issue on Design and Implementation of Signal Processing Systems. J. Signal Process. Syst. 91(9): 979 (2019) - [c134]Andreas Toftegaard Kristensen, Andreas Burg, Alexios Balatsoukas-Stimming:
Advanced Machine Learning Techniques for Self-Interference Cancellation in Full-Duplex Radios. ACSSC 2019: 1149-1153 - [c133]Orion Afisiadis, Matthieu Cotting, Andreas Burg, Alexios Balatsoukas-Stimming:
LoRa Symbol Error Rate Under Non-Aligned Interference. ACSSC 2019: 1957-1961 - [c132]Jonathan Narinx, Robert Giterman, Andrea Bonetti, Nicolas Frigerio, Cosimo Aprile, Andreas Burg, Yusuf Leblebici:
A 24 kb Single-Well Mixed 3T Gain-Cell eDRAM with Body-Bias in 28 nm FD-SOI for Refresh-Free DSP Applications. A-SSCC 2019: 219-222 - [c131]Gain Kim, Lukas Kull, Danny Luu, Matthias Braendli, Christian Menolfi, Pier Andrea Francese, Hazar Yueksel, Cosimo Aprile, Thomas Morf, Marcel A. Kossel, Alessandro Cevrero, Ilter Özkaya, Hyeon-Min Bae, Andreas Burg, Thomas Toifl, Yusuf Leblebici:
A 4.8pJ/b 56Gb/s ADC-Based PAM-4 Wireline Receiver Data-Path with Cyclic Prefix in 14nm FinFET. A-SSCC 2019: 239-240 - [c130]Marc Pons, Christoph Thomas Müller, David Ruffieux, Jean-Luc Nagel, Stéphane Emery, Andreas Burg, Shuuji Tanahashi, Yoshitaka Tanaka, Atsushi Takeuchi:
A 0.5 V 2.5 μW/MHz Microcontroller with Analog-Assisted Adaptive Body Bias PVT Compensation with 3.13nW/kB SRAM Retention in 55nm Deeply-Depleted Channel CMOS. CICC 2019: 1-4 - [c129]Marco Widmer, Andrea Bonetti, Andreas Burg:
FPGA-Based Emulation of Embedded DRAMs for Statistical Error Resilience Evaluation of Approximate Computing Systems. DAC 2019: 36 - [c128]Reza Ghanaatian, Orion Afisiadis, Matthieu Cotting, Andreas Burg:
Lora Digital Receiver Analysis and Implementation. ICASSP 2019: 1498-1502 - [c127]Ester Vicario Bravo, Andrea Bonetti, Andreas Burg:
Data-Retention-Time Characterization of Gain-Cell eDRAMs Across the Design and Variations Space. ISCAS 2019: 1-5 - [c126]Gain Kim, Lukas Kull, Danny Luu, Matthias Braendli, Christian Menolfi, Pier Andrea Francese, Hazar Yueksel, Cosimo Aprile, Thomas Morf, Marcel A. Kossel, Alessandro Cevrero, Ilter Özkaya, Andreas Burg, Thomas Toifl, Yusuf Leblebici:
A 161mW 56Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14nm FinFET. ISSCC 2019: 476-478 - [c125]Reza Ghanaatian, Vahid Jamali, Andreas Burg, Robert Schober:
Feedback-Aware Precoding for Millimeter Wave Massive MIMO Systems. PIMRC 2019: 1-7 - [c124]Firat Celik, Ayca Akkaya, Armin Tajalli, Andreas Burg, Yusuf Leblebici:
JESD204B Compliant 12.5 Gb/s LVDS and SST Transmitters in 28 nm FD-SOI CMOS. PRIME 2019: 101-104 - [c123]Christoph Thomas Müller, Marc Pons, David Ruffieux, Jean-Luc Nagel, Stéphane Emery, Andreas Burg, Shuuji Tanahashi, Yoshitaka Tanaka, Atsushi Takeuchi:
Minimum Energy Point in Constant Frequency Designs under Adaptive Supply Voltage and Body Bias Adjustment in 55 nm DDC. PRIME 2019: 285-288 - [c122]Adrian Schumacher, Ruben Merz, Andreas Burg:
3.5 GHz Coverage Assessment with a 5G Testbed. VTC Spring 2019: 1-6 - [i30]Orion Afisiadis, Matthieu Cotting, Andreas Burg, Alexios Balatsoukas-Stimming:
LoRa Symbol Error Rate Under Non-Chip- and Non-Phase-Aligned Interference. CoRR abs/1905.00439 (2019) - 2018
- [j41]Robert Giterman, Alexander Fish, Narkis Geuli, Elad Mentovich, Andreas Burg, Adam Teman:
An 800-MHz Mixed- VT 4T IFGC Embedded DRAM in 28-nm CMOS Bulk Process for Approximate Storage Applications. IEEE J. Solid State Circuits 53(7): 2136-2148 (2018) - [j40]Andreas Burg, Anupam Chattopadhyay, Kwok-Yan Lam:
Wireless Communication and Security Issues for Cyber-Physical Systems and the Internet-of-Things. Proc. IEEE 106(1): 38-60 (2018) - [j39]Robert Giterman, Alexander Fish, Andreas Burg, Adam Teman:
A 4-Transistor nMOS-Only Logic-Compatible Gain-Cell Embedded DRAM With Over 1.6-ms Retention Time at 700 mV in 28-nm FD-SOI. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(4): 1245-1256 (2018) - [j38]Hazar Yueksel, Matthias Braendli, Andreas Burg, Giovanni Cherubini, Roy D. Cideciyan, Pier Andrea Francese, Simeon Furrer, Marcel A. Kossel, Lukas Kull, Danny Luu, Christian Menolfi, Thomas Morf, Thomas Toifl:
Design Techniques for High-Speed Multi-Level Viterbi Detectors and Trellis-Coded-Modulation Decoders. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3529-3542 (2018) - [j37]Alexios Balatsoukas-Stimming, Andreas Burg:
Faulty Successive Cancellation Decoding of Polar Codes for the Binary Erasure Channel. IEEE Trans. Commun. 66(6): 2322-2332 (2018) - [j36]Reza Ghanaatian, Alexios Balatsoukas-Stimming, Thomas Christoph Müller, Michael Meidlinger, Gerald Matz, Adam Teman, Andreas Burg:
A 588-Gb/s LDPC Decoder Based on Finite-Alphabet Message Passing. IEEE Trans. Very Large Scale Integr. Syst. 26(2): 329-340 (2018) - [c121]Yann Kurzo, Andreas Burg, Alexios Balatsoukas-Stimming:
Design and Implementation of a Neural Network Aided Self-Interference Cancellation Scheme for Full-Duplex Radios. ACSSC 2018: 589-593 - [c120]Andrea Bonetti, Jeremy Constantin, Adam Ternan, Andreas Burg:
A Timing-Monitoring Sequential for Forward and Backward Error-Detection in 28 nm FD-SOI. ISCAS 2018: 1-4 - [c119]Pascal Giard, Alexios Balatsoukas-Stimming, Andreas Burg:
On the Tradeoff Between Accuracy and Complexity in Blind Detection of Polar Codes. ISTC 2018: 1-5 - [c118]Pascal Giard, Andreas Burg:
Fast-SSC-flip decoding of polar codes. WCNC Workshops 2018: 73-77 - [i29]Pascal Giard, Alexios Balatsoukas-Stimming, Andreas Burg:
On the Tradeoff Between Accuracy and Complexity in Blind Detection of Polar Codes. CoRR abs/1807.00655 (2018) - [i28]Reza Ghanaatian, Vahid Jamali, Andreas Burg, Robert Schober:
Feedback-Aware Precoding for Millimeter Wave Massive MIMO Systems. CoRR abs/1811.04138 (2018) - [i27]Reza Ghanaatian, Orion Afisiadis, Matthieu Cotting, Andreas Burg:
LoRa Digital Receiver Analysis and Implementation. CoRR abs/1811.04146 (2018) - 2017
- [j35]Davide Rossi, Igor Loi, Antonio Pullini, Thomas Christoph Müller, Andreas Burg, Francesco Conti, Luca Benini, Philippe Flatresse:
A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors. IEEE Des. Test 34(6): 46-53 (2017) - [j34]Pascal Giard, Alexios Balatsoukas-Stimming, Thomas Christoph Müller, Andrea Bonetti, Claude Thibeault, Warren J. Gross, Philippe Flatresse, Andreas Burg:
PolarBear: A 28-nm FD-SOI ASIC for Decoding of Polar Codes. IEEE J. Emerg. Sel. Topics Circuits Syst. 7(4): 616-629 (2017) - [j33]Davide Rossi, Antonio Pullini, Igor Loi, Michael Gautschi, Frank Kagan Gürkaynak, Adam Teman, Jeremy Constantin, Andreas Burg, Ivan Miro Panades, Edith Beigné, Fabien Clermidy, Philippe Flatresse, Luca Benini:
Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster. IEEE Micro 37(5): 20-31 (2017) - [j32]Andrea Bonetti, Adam Teman, Philippe Flatresse, Andreas Burg:
Multipliers-Driven Perturbation of Coefficients for Low-Power Operation in Reconfigurable FIR Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(9): 2388-2400 (2017) - [j31]Andrea Bonetti, Nicholas Preyss, Adam Teman, Andreas Burg:
Automated Integration of Dual-Edge Clocking for Low-Power Operation in Nanometer Nodes. ACM Trans. Design Autom. Electr. Syst. 22(4): 62:1-62:20 (2017) - [j30]Jeremy Constantin, Raphaël Houlmann, Nicholas Preyss, Nino Walenta, Hugo Zbinden, Pascal Junod, Andreas Burg:
An FPGA-Based 4 Mbps Secret Key Distillation Engine for Quantum Key Distribution Systems. J. Signal Process. Syst. 86(1): 1-15 (2017) - [c117]Orion Afisiadis, Andrew Charles Mallory Austin, Alexios Balatsoukas-Stimming, Andreas Burg:
Full-duplex communications for wireless links with asymmetric capacity requirements. ACSSC 2017: 1682-1686 - [c116]Robert Giterman, Alexander Fish, Narkis Geuli, Elad Mentovich, Andreas Burg, Adam Teman:
An 800 Mhz mixed-VT 4T gain-cell embedded DRAM in 28 nm CMOS bulk process for approximate computing applications. ESSCIRC 2017: 308-311 - [c115]Andrew Charles Mallory Austin, Orion Afisiadis, Andreas Burg:
Digital predistortion of hardware impairments for full-duplex transceivers. GlobalSIP 2017: 878-882 - [c114]Reza Ghanaatian, Andreas Burg:
DVFS based power management for LDPC decoders with early termination. SiPS 2017: 1-6 - [c113]Pascal Giard, Alexios Balatsoukas-Stimming, Andreas Burg:
Blind detection of polar codes. SiPS 2017: 1-6 - [c112]Alexios Balatsoukas-Stimming, Pascal Giard, Andreas Burg:
Comparison of Polar Decoders with Existing Low-Density Parity-Check and Turbo Decoders. WCNC Workshops 2017: 1-6 - [i26]Pascal Giard, Alexios Balatsoukas-Stimming, Thomas Christoph Müller, Andreas Peter Burg, Claude Thibeault, Warren J. Gross:
A Multi-Gbps Unrolled Hardware List Decoder for a Systematic Polar Code. CoRR abs/1702.00938 (2017) - [i25]Alexios Balatsoukas-Stimming, Pascal Giard, Andreas Burg:
Comparison of Polar Decoders with Existing Low-Density Parity-Check and Turbo Decoders. CoRR abs/1702.04707 (2017) - [i24]Reza Ghanaatian, Alexios Balatsoukas-Stimming, Thomas Christoph Müller, Michael Meidlinger, Gerald Matz, Adam Teman, Andreas Burg:
A 594 Gbps LDPC Decoder Based on Finite-Alphabet Message Passing. CoRR abs/1703.05769 (2017) - [i23]Pascal Giard, Alexios Balatsoukas-Stimming, Andreas Burg:
Blind Detection of Polar Codes. CoRR abs/1705.02111 (2017) - [i22]Pascal Giard, Alexios Balatsoukas-Stimming, Thomas Christoph Müller, Andrea Bonetti, Claude Thibeault, Warren J. Gross, Philippe Flatresse, Andreas Burg:
PolarBear: A 28-nm FD-SOI ASIC for Decoding of Polar Codes. CoRR abs/1708.09603 (2017) - [i21]Pascal Giard, Andreas Burg:
Fast-SSC-Flip Decoding of Polar Codes. CoRR abs/1712.00256 (2017) - 2016
- [j29]Noa Edri, Pascal Meinerzhagen, Adam Teman, Andreas Burg, Alexander Fish:
Silicon-Proven, Per-Cell Retention Time Distribution Model for Gain-Cell Based eDRAMs. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(2): 222-232 (2016) - [j28]Oskar Andersson, Babak Mohammadi, Pascal Meinerzhagen, Andreas Burg, Joachim Neves Rodrigues:
Ultra Low Voltage Synthesizable Memories: A Trade-Off Discussion in 65 nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(6): 806-817 (2016) - [j27]Adam Teman, Davide Rossi, Pascal Meinerzhagen, Luca Benini, Andreas Burg:
Power, Area, and Performance Optimization of Standard Cell Memory Arrays Through Controlled Placement. ACM Trans. Design Autom. Electr. Syst. 21(4): 59:1-59:25 (2016) - [j26]Robert Giterman, Adam Teman, Pascal Andreas Meinerzhagen, Lior Atias, Andreas Burg, Alexander Fish:
Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications. IEEE Trans. Very Large Scale Integr. Syst. 24(1): 358-362 (2016) - [j25]Christian Senning, Georgios Karakonstantis, Andreas Burg:
Cross-Layer Energy-Efficiency Optimization of Packet Based Wireless MIMO Communication Systems. J. Signal Process. Syst. 85(1): 129-142 (2016) - [c111]Pascal Giard, Alexios Balatsoukas-Stimming, Thomas Christoph Müller, Andreas Peter Burg, Claude Thibeault, Warren J. Gross:
A multi-Gbps unrolled hardware list decoder for a systematic polar code. ACSSC 2016: 1194-1198 - [c110]Davide Rossi, Antonio Pullini, Igor Loi, Michael Gautschi, Frank Kagan Gürkaynak, Adam Teman, Jeremy Constantin, Andreas Burg, Ivan Miro Panades, Edith Beigné, Fabien Clermidy, Fady Abouzeid, Philippe Flatresse, Luca Benini:
193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing. COOL Chips 2016: 1-3 - [c109]Hazar Yueksel, Giovanni Cherubini, Roy D. Cideciyan, Simeon Furrer, Andreas Burg, Thomas Toifl:
High-speed link with trellis-coded modulation and Reed-Solomon coding. CSCN 2016: 231-236 - [c108]Jeremy Constantin, Andreas Peter Burg, Zheng Wang, Anupam Chattopadhyay, Georgios Karakonstantis:
Statistical fault injection for impact-evaluation of timing errors on application performance. DAC 2016: 13:1-13:6 - [c107]Loris Duch, Pablo García Del Valle, Shrikanth Ganapathy, Andreas Burg, David Atienza:
Energy vs. reliability trade-offs exploration in biomedical ultra-low power devices. DATE 2016: 838-841 - [c106]Andreas Peter Burg:
Approximate computing for unreliable silicon. DTIS 2016: 1 - [c105]Jeremy Constantin, Andrea Bonetti, Adam Teman, Thomas Christoph Müller, Lorenz Schmid, Andreas Burg:
DynOR: A 32-bit microprocessor in 28 nm FD-SOI with cycle-by-cycle dynamic clock adjustment. ESSCIRC 2016: 261-264 - [c104]Hazar Yueksel, Matthias Braendli, Andreas Burg, Giovanni Cherubini, Roy D. Cideciyan, Pier Andrea Francese, Simeon Furrer, Marcel A. Kossel, Lukas Kull, Danny Luu, Christian Menolfi, Thomas Morf, Thomas Toifl:
A 4.1 pJ/b 25.6 Gb/s 4-PAM reduced-state sliding-block Viterbi detector in 14 nm CMOS. ESSCIRC 2016: 309-312 - [c103]Hazar Yueksel, Giovanni Cherubini, Roy D. Cideciyan, Andreas Burg, Thomas Toifl:
Design considerations on sliding-block viterbi detectors for high-speed data transmission. ICSPCS 2016: 1-6 - [c102]Nicholas Preyss, Andreas Burg:
Experimental signal-quality characterization of a high-capacity mmWave link for backhaul applications. SAM 2016: 1-5 - [c101]Pascal Giard, Gabi Sarkis, Alexios Balatsoukas-Stimming, YouZhe Fan, Chi-Ying Tsui, Andreas Peter Burg, Claude Thibeault, Warren J. Gross:
Hardware decoders for polar codes: An overview. ISCAS 2016: 149-152 - [c100]Robert Giterman, Adam Teman, Pascal Meinerzhagen, Alexander Fish, Andreas Burg:
A process compensated gain cell embedded-DRAM for ultra-low-power variation-aware design. ISCAS 2016: 1006-1009 - [c99]Reza Ghanaatian, Paul N. Whatmough, Jeremy Constantin, Adam Teman, Andreas Burg:
A low-power correlator for wakeup receivers with algorithm pruning through early termination. ISCAS 2016: 2667-2670 - [c98]Andrew Charles Mallory Austin, Alexios Balatsoukas-Stimming, Andreas Peter Burg:
Digital predistortion of power amplifier non-linearities for full-duplex transceivers. SPAWC 2016: 1-5 - [c97]Orion Afisiadis, Andrew Charles Mallory Austin, Alexios Balatsoukas-Stimming, Andreas Burg:
Sliding Window Spectrum Sensing for Full-Duplex Cognitive Radios with Low Access-Latency. VTC Spring 2016: 1-5 - [i20]Pascal Giard, Gabi Sarkis, Alexios Balatsoukas-Stimming, YouZhe Fan, Chi-Ying Tsui, Andreas Burg, Claude Thibeault, War